74ABT74DB: Dual D-type flip-flop
The 74ABT74 high-performance BiCMOS device combines low static and dynamic power
dissipation with high speed and high output drive.
The 74ABT74 is a dual positive edge-triggered D-type flip-flop featuring individual data, clock,
set, and reset inputs; also true and complementary outputs. Set (nSD) and reset (nRD) are
asynchronous active low inputs and operate independently of the clock input. When set
and reset are inactive (HIGH), data at the nD input is transferred to the nQ and nQ outputs on the LOW-to-HIGH clock transition. Data must
be stable just one setup time prior to the LOW-to-HIGH clock transition for predictable
operation. Clock triggering occurs at a voltage level and is not directly related to the
transition time of the positive-going pulse. Following the hold time interva
74ABT74DB: Product Block Diagram
Outline 3d SOT337-1
Data Sheets (1)
Application Notes (4)
Selector Guides (1)
Name/Description | Modified Date |
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ABT_FUNCSELGD_1 (REV 0.1) PDF (13.0 kB) ABT_FUNCSELGD_1 [English] | 13 Aug 2004 |
Package Information (1)
Packing (1)
Supporting Information (2)
IBIS Model
SPICE model
Ordering Information
Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
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74ABT74DB | Active | ABT | 4.5 - 5.5 | D-type flip-flops | TTL | positive-edge trigger | -15/+20 | SOT337-1 | 3 | 250 | medium | -40~85 | 156 | 40.0 | | SSOP14 | 14 |
Package Information