74AHCT1G00GV: 2-input NAND gate _ BDTIC a Leading Distributor in China

74AHCT1G00GV: 2-input NAND gate

74AHC1G00 and 74AHCT1G00 are high-speed Si-gate CMOS devices. They provide a 2-input NAND function.

The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.

The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.

74AHCT1G00GV: Product Block Diagram

Outline 3d SOT753

Data Sheets (1)

Name/Description	Modified Date
2-input NAND gate (REV 7.0) PDF (130.0 kB) 74AHC_AHCT1G00 [English]	05 Nov 2014

Application Notes (6)

Name/Description	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English]	04 Nov 2011
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English]	30 Oct 2002

Brochures (2)

Name/Description	Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]	16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]	20 May 2014

Selector Guides (2)

Name/Description	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

Package Information (1)

Name/Description	Modified Date
plastic surface-mounted package; 5 leads (REV 1.0) PDF (243.0 kB) SOT753 [English]	08 Feb 2016

Packing (1)

Name/Description	Modified Date
Tape reel SMD; reversed product orientation 12NC ending 125 (REV 1.0) PDF (186.0 kB) SOT753_125 [English]	29 Nov 2012

Supporting Information (1)

Name/Description	Modified Date
MAR_SOT753 Topmark (REV 1.0) PDF (89.0 kB) MAR_SOT753 [English]	03 Jun 2013

IBIS Model

ahct1g00 IBIS model (REV 1.0) ibs AHCT1G00 4/7/2013

Ordering Information

Product	Status	Family	Function	V_CC (V)	Logic switching levels	Description	Type	Output drive capability (mA)	Package version	t_pd (ns)	f_max (MHz)	No of bits	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74AHCT1G00GV	Active	AHC(T)	NAND gates	4.5 - 5.5	TTL	TTL enabled	NAND gates	+/- 8	SOT753	3.6	60	1	low	-40~125	272	64.5	170	TSOP5	5

Package Information

Product ID	Package Description	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	RoHS / Pb Free / RHF	LeadFree Conversion Date	EFR	IFR(FIT)	MTBF(hour)	MSL	MSL LF
74AHCT1G00GV		SOT753		Reel 7" Q3/T4, Reverse	Active	74AHCT1G00GV,125 (9352 716 48125)	C00	74AHCT1G00GV		week 36, 2003	84.9	6.62	1.51E8	1	1

2-input NAND gate 74AHCT1G00GW

Sorting through the low voltage logic maze 74LVC_H_245A_Q100

Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100

Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100

Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100

Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100

PicoGate Logic footprints NX3L4684

電圧レベルシフタ 74AVC16245DGG-Q100

Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100

ロジック製品セレクションガイド... 74LVC_H_245A_Q100

Logic selection guide 2016 74LVC_H_245A_Q100

MAR_SOT753 Topmark 74LVC1G17_Q100

ahct1g00 IBIS model 74AHCT1G00GW

plastic surface-mounted package; 5 leads 74LVC1G17_Q100

Tape reel SMD; reversed product orientation 12NC ending 125 74LVC1G17_Q100

74LVC1G00

BAP70Q

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