74AHCT2G125GD: Dual buffer/line driver; 3-state

The 74AHC2G125 and 74AHCT2G125 are high-speed Si-gate CMOS devices. They provide a dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH at nOE causes the output to assume a high-impedance OFF-state.

The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.

The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.

74AHCT2G125GD: Product Block Diagram
Outline 3d SOT996-2
Data Sheets (1)
Name/DescriptionModified Date
Bus buffer/line driver; 3-state (REV 3.0) PDF (187.0 kB) 74AHC_AHCT2G125 [English]06 May 2013
Application Notes (7)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English]04 Nov 2011
MicroPak soldering information (REV 2.0) PDF (245.0 kB) AN10343 [English]30 Dec 2010
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English]30 Oct 2002
Brochures (2)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Selector Guides (2)
Name/DescriptionModified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
Package Information (1)
Name/DescriptionModified Date
plastic extremely thin small outline package; no leads; 8 terminals; body 3 x 2 x 0.5 mm (REV 1.0) PDF (190.0 kB) SOT996-2 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
XSON8(U); Reel pack, Reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or... (REV 5.0) PDF (200.0 kB) SOT996-2_125 [English]02 May 2013
Ordering Information
ProductStatusFamilyVCC (V)FunctionLogic switching levelsDescriptionOutput drive capability (mA)Package versionfmax (MHz)No of bitsPower dissipation considerationstpd (ns)Tamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74AHCT2G125GDActiveAHC(T)4.5 - 5.5Buffers/inverters/driversTTLTTL enabled (3-state)+/- 8SOT996-2602low3.4-40~12562786.0284XSON88
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74AHCT2G125GDSOT996-2Reel 7" Q3/T4, ReverseActive74AHCT2G125GD,125 (9352 885 55125)C2574AHCT2G125GDAlways Pb-free84.96.621.51E811
Bus buffer/line driver; 3-state 74AHCT2G125GD
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100
MicroPak soldering information NTS0102_Q100
PicoGate Logic footprints NX3L4684
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
plastic extremely thin small outline package; no leads; 8 terminals; body 3 x 2 x 0.5 mm 74AHC_T_3G14_Q100
XSON8(U); Reel pack, Reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or... 74AHC_T_3G14_Q100
74VHC_T_125
LM75B