74ALVCH16827DGG: 20-bit buffer/line driver, non-inverting (3-State)

The 74ALVCH16827 is a 20-bit non-inverting buffer/driver with 3-State outputs for bus oriented applications.

The 74ALVCH16827 consists of two 10-bit sections with separate output enable signals. For either 10-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be active. If either output enable input is high, the outputs of that 10-bit buffer section are in high impedance state.

The 74ALVCH16827 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

74ALVCH16827DGG: Product Block Diagram

Outline 3d SOT364-1

Data Sheets (1)

Name/Description	Modified Date
20-bit buffer/line driver, non-inverting (3-state) (REV 2.0) PDF (73.0 kB) 74ALVCH16827 [English]	14 Mar 2014

Application Notes (5)

Name/Description	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]	15 Sep 1995

Brochures (2)

Name/Description	Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]	16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]	20 May 2014

Selector Guides (2)

Name/Description	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

Package Information (1)

Name/Description	Modified Date
plastic thin shrink small outline package; 56 leads; body width 6.1 mm (REV 1.0) PDF (506.0 kB) SOT364-1 [English]	08 Feb 2016

Packing (1)

Name/Description	Modified Date
TSSOP56; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 4.0) PDF (248.0 kB) SOT364-1_118 [English]	15 Apr 2013

Supporting Information (1)

Name/Description	Modified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]	08 Oct 2009

IBIS Model

alvch16827 IBIS model (REV 1.0) ibs ALVCH16827 4/7/2013

Ordering Information

Product	Status	Family	Function	V_CC (V)	Description	Logic switching levels	Package version	Output drive capability (mA)	f_max (MHz)	No of bits	Power dissipation considerations	t_pd (ns)	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74ALVCH16827DGG	Active	ALVC	Buffers/inverters/drivers	2.3 - 3.6	20-bit buffer/line driver with bus hold (3-state)	LVTTL	SOT364-1	+/- 24	150	20	low	2	-40~85	93	21.0		TSSOP56	56
74ALVCH16827DGG/G	No Longer Manufactured			2.3 - 3.6		LVTTL		+/- 24	150	20	low		-40~85	93	21.0		TSSOP56

Package Information

Product ID	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	LeadFree Conversion Date	EFR	IFR(FIT)	MTBF(hour)	MSL	MSL LF
74ALVCH16827DGG	SOT364-1	SSOP-TSSOP-VSO-WAVE	Tube in Drypack	Active	74ALVCH16827DGGS (9352 543 90512)	ALVCH16827	74ALVCH16827DGG	Always Pb-free	123.8	3.87	2.58E8	1	1
			Reel 13" Q1/T1 in Drypack	Active	74ALVCH16827DGGY (9352 543 90518)	ALVCH16827	74ALVCH16827DGG	Always Pb-free	123.8	3.87	2.58E8	1	1
			Bulk Pack	Withdrawn	74ALVCH16827DGG:11 (9352 543 90112)	ALVCH16827	74ALVCH16827DGG	week 2, 2006	123.8	3.87	2.58E8	1	1
			Reel 13" Q1/T1	Withdrawn	74ALVCH16827DGG,11 (9352 543 90118)	ALVCH16827	74ALVCH16827DGG	week 2, 2006	123.8	3.87	2.58E8	1	1