74ALVT162823DGG: 18-bit bus-interface D-type flip-flop
The 74ALVT162823 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data or address paths of buses carrying parity.
The 74ALVT162823 has two 9-bit wide buffered registers with clock enable (nCE) and master reset (nMR) which are ideal for parity bus interfacing in high microprogrammed systems.
The registers are fully edge-triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition is transferred to the corresponding Q output of the flip-flop.
The 74ALVT162823 is designed with 30 Ω series resistance in both the pull-up and pull-down output structures. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus receivers or transmitters.
74ALVT162823DGG: Product Block Diagram
Outline 3d SOT364-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| 18-bit bus-interface D-type flip-flop with reset and enable with 30 Ohm termination resistors; 3-state (REV 2.0) PDF (116.0 kB) 74ALVT162823 [English] | 11 Aug 2005 |
Application Notes (8)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
| Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English] | 13 Mar 2013 |
| Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
| Test Fixtures for High Speed Logic (REV 1.0) PDF (341.0 kB) AN203 [English] | 02 Apr 1998 |
| Transmission Lines and Terminations with Philips Advanced Logic Families (REV 1.0) PDF (217.0 kB) AN246 [English] | 01 Feb 1998 |
| LVT (Low Voltage Technology) and ALVT (Advanced LVT) (REV 1.0) PDF (133.0 kB) AN243 [English] | 01 Jan 1998 |
| Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English] | 15 Sep 1995 |
Brochures (2)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Selector Guides (2)
| Name/Description | Modified Date |
|---|---|
| ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English] | 19 Nov 2015 |
| Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English] | 08 Jan 2015 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic thin shrink small outline package; 56 leads; body width 6.1 mm (REV 1.0) PDF (506.0 kB) SOT364-1 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| TSSOP56; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 4.0) PDF (248.0 kB) SOT364-1_118 [English] | 15 Apr 2013 |
Supporting Information (1)
| Name/Description | Modified Date |
|---|---|
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
IBIS Model
- alvt162823 IBIS model (REV 1.0) ibs ALVT162823 4/7/2013
SPICE model
- alvt16 Spice model (REV 1.0) ZIP ALVT16 5/7/2013
Ordering Information
| Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74ALVT162823DGG | Active | ALVT | 2.3 - 3.6 | D-type flip-flops | TTL | 18-bit buffer/line driver with bus hold and 30 Ohm termination resistors (3-state) | +/- 12 | SOT364-1 | 3 | 150 | medium | -40~85 | 93 | 21.0 | TSSOP56 | 56 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74ALVT162823DGG | | SOT364-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 in Drypack | Active | 74ALVT162823DGGY (9352 616 58518) | ALVT162823 | 74ALVT162823DGG |    | Always Pb-free | 70.8 | 1.33 | 7.52E8 | 2 | 2 |
| Tube in Drypack | Active | 74ALVT162823DGGS (9352 616 58512) | ALVT162823 | 74ALVT162823DGG | | Always Pb-free | 70.8 | 1.33 | 7.52E8 | 2 | 2 |
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
- Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
- Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
- Test Fixtures for High Speed Logic 74ABTH162245ADL
- Transmission Lines and Terminations with Philips Advanced Logic Families 74LVTN16245BDGG
- LVT (Low Voltage Technology) and ALVT (Advanced LVT) 74LVTN16245BDGG
- Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- ロジック製品セレクションガイド... 74LVC_H_245A_Q100
- Logic selection guide 2016 74LVC_H_245A_Q100
- TSSOP56; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... pcf8576d_automotive
- alvt162823 IBIS model 74ALVT162823DGG
- alvt16 Spice model 74ALVT16827DL
- plastic thin shrink small outline package; 56 leads; body width 6.1 mm pcf8576d_automotive
- SSOP-TSSOP-VSO-WAVE LPC1114FDH28
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