74AUP2G38GT: Low-power dual 2-input NAND gate; open drain
The 74AUP2G38 provides the dual 2-input NAND gate with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
74AUP2G38GT: Product Block Diagram
Outline 3d SOT833-1
Data Sheets (1)
Application Notes (4)
Brochures (3)
Selector Guides (2)
Package Information (1)
Packing (1)
Supporting Information (1)
Name/Description | Modified Date |
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MAR_SOT833 Topmark (REV 1.0) PDF (75.0 kB) MAR_SOT833 [English] | 03 Jun 2013 |
Ordering Information
Product | Status | Family | VCC (V) | Function | Logic switching levels | Type | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
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74AUP2G38GT | Active | AUP | 1.1 - 3.6 | NAND gates | CMOS | NAND gates | open-drain | 1.9 | SOT833-1 | 8.5 | 70 | 2 | ultra low | -40~125 | 327 | 6.1 | 157 | XSON8 | 8 |
Package Information
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
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74AUP2G38GT | | SOT833-1 | | Reel 7" Q1/T1 | Active | 74AUP2G38GT,115
(9352 807 16115) | a38 | 74AUP2G38GT | | Always Pb-free | 0.0 | 3.29 | 3.04E8 | 1 | 1 |