74AVC16334ADGG: 16-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3‑state)

The 74AVC16334A is a 16-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP).

This product is designed to have an extremely fast propagation delay and a minimum amount of power consumption. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient.

Outline 3d SOT362-1
Data Sheets (1)
Name/DescriptionModified Date
16-bit registered driver with inverted register enable and Dynamic Controlled Outputs(TM) (3-state) (REV 2.0) PDF (92.0 kB) 74AVC16334A [English]13 Mar 2014
Application Notes (3)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
A metastability primer (REV 1.0) PDF (40.0 kB) AN219 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Brochures (2)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Package Information (1)
Name/DescriptionModified Date
plastic thin shrink small outline package; 48 leads; body width 6.1 mm (REV 1.0) PDF (467.0 kB) SOT362-1 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
TSSOP48; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 5.0) PDF (242.0 kB) SOT362-1_118 [English]15 Apr 2013
Supporting Information (1)
Name/DescriptionModified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS Model
Ordering Information
ProductStatusFamilyVCC (V)FunctionLogic switching levelsDescriptionOutput drive capability (mA)Package versiontpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74AVC16334ADGGActiveAVC(M)1.2 - 3.6Latches/registered driversCMOS16-bit registered driver (3-State)+/- 12SOT362-1216very low-40~85821.835TSSOP4848
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateMSLMSL LF
74AVC16334ADGGSOT362-1SSOP-TSSOP-VSO-WAVEBulk PackActive74AVC16334ADGG,112 (9352 679 30112)74AVC16334ADGG74AVC16334ADGGAlways Pb-free11
Reel 13" Q1/T1Active74AVC16334ADGG,118 (9352 679 30118)74AVC16334ADGG74AVC16334ADGGAlways Pb-free11
Reel 13" Q1/T1 in DrypackWithdrawn74AVC16334ADGG,518 (9352 679 30518)74AVC16334ADGG74AVC16334ADGGweek 18, 200523
16-bit registered driver with inverted register enable and Dynamic Controlled Outputs(TM) (3-state) 74AVC16334ADGG
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
A metastability primer 74AHC573PW
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
av334a15 IBIS model 74AVC16334ADGG
av334a18 IBIS model 74AVC16334ADGG
av334a25 IBIS model 74AVC16334ADGG
av334a33 IBIS model 74AVC16334ADGG
plastic thin shrink small outline package; 48 leads; body width 6.1 mm 74LVC_H_16245A_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
TSSOP48; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LVC_H_16245A_Q100
74LVTN16245B