The 74HC/HCT160 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT160 are synchronous presettable decade counters which feature an internal look-ahead carry and can be used for high-speed counting.
Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP).
The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW level. A LOW level at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock (providing that the set-up and hold time requirements for PE are met). Preset takes place regardless of the levels at count enable inputs (CEP and CET).
A LOW level at the master reset input (MR) sets all four outputs of the flip-flops (Q0 to Q3) to LOW level regardless of the levels at CP, PE, CET and CEP inputs (thus providing an asynchronous clear function).
The look-ahead carry simplifies serial cascading of the counters. Both count enable inputs (CEP and CET) must be HIGH to count. The CET input is fed forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HIGH level output of Q0. This pulse can be used to enable the next cascaded stage.
The maximum clock frequency for the cascaded counters is determined by the CP to TC propagation delay and CEP to CP set-up time, according to the following formula:
fmax= (1) / (tP (max)( CP to TC) + tSU(CEP to CP) )
Name/Description | Modified Date |
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Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
Pin FMEA 74HC/74HCT family (REV 1.0) PDF (51.0 kB) AN11044 [English] | 16 Mar 2011 |
Name/Description | Modified Date |
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HC/T User Guide (REV 1.0) PDF (508.0 kB) HCT_USER_GUIDE [English] | 01 Nov 1997 |
Name/Description | Modified Date |
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plastic shrink small outline package; 16 leads; body width 5.3 mm (REV 1.0) PDF (306.0 kB) SOT338-1 [English] | 08 Feb 2016 |
Name/Description | Modified Date |
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Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English] | 08 Oct 2009 |
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
Product | Status | Family | Function | VCC (V) | Description | Output drive capability (mA) | Package version | Logic switching levels | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
74HC160DB | Active | HC(T) | BCD/decade counters | 2.0 - 6.0 | asynchronous reset | +/- 5.2 | SOT338-1 | CMOS | 18 | 55 | low | -40~125 | 148 | 42.0 | SSOP16 | 16 |
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
74HC160DB | SOT338-1 | SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74HC160DB,118 (9351 896 80118) | HC160 | 74HC160DB | week 17, 2005 | 84.9 | 6.62 | 1.51E8 | 1 | 1 | ||
Bulk Pack | Active | 74HC160DB,112 (9351 896 80112) | HC160 | 74HC160DB | week 17, 2005 | 84.9 | 6.62 | 1.51E8 | 1 | 1 |