74LV138DB: 3-to-8 line decoder/demultplexer; inverting
The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138.
The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive active LOW outputs (Y0 to Y7).
There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74LV138 devices and one inverter. The 74LV138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state.
74LV138DB: Product Block Diagram
Outline 3d SOT338-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| 3-to-8 line decoder/demultplexer; inverting (REV 4.0) PDF (185.0 kB) 74LV138 [English] | 04 Mar 2016 |
Application Notes (1)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
Brochures (2)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic shrink small outline package; 16 leads; body width 5.3 mm (REV 1.0) PDF (306.0 kB) SOT338-1 [English] | 08 Feb 2016 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English] | 08 Oct 2009 |
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
SPICE model
- lv Spice model (REV 1.0) ZIP LV 5/7/2013
Ordering Information
| Product | Status | Family | VCC (V) | Function | Description | Logic switching levels | Output drive capability (mA) | Package version | tpd (ns) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV138DB | Active | LV | 1.0 - 5.5 | Decoders/demultiplexers | inverting | TTL | +/- 12 | SOT338-1 | 12 | low | -40~125 | 148 | 42.0 | SSOP16 | 16 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV138DB | | SOT338-1 | SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74LV138DB,118 (9351 659 60118) | LV138 | 74LV138DB |    | week 12, 2005 | 144.9 | 10.23 | 9.78E7 | 1 | 1 |
| Bulk Pack | Active | 74LV138DB,112 (9351 659 60112) | LV138 | 74LV138DB | | week 12, 2005 | 144.9 | 10.23 | 9.78E7 | 1 | 1 |
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- lv Spice model 74LV74PW
- plastic shrink small outline package; 16 leads; body width 5.3 mm 74HC_T_595_Q100
- Footprint for reflow soldering 74HC_T_595_Q100
- SSOP-TSSOP-VSO-WAVE LPC1114FDH28
- 74LVC138A
- HEF4094B
