74LV4060DB: 14-stage binary ripple counter with oscillator
The 74LV4060 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC4060; 74HCT4060.
The 74LV4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC). It has ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator can be replaced by an external clock signal at input RS. In this case, keep the oscillator pins (RTC and CTC) floating.
The counter advances on the negative-going transition of RS. A HIGH-level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of the other input conditions.
74LV4060DB: Product Block Diagram
74LV4060DB: Block Diagram
Outline 3d SOT338-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| 14-stage binary ripple counter with oscillator (REV 4.0) PDF (237.0 kB) 74LV4060 [English] | 18 Mar 2016 |
Application Notes (1)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
Brochures (2)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic shrink small outline package; 16 leads; body width 5.3 mm (REV 1.0) PDF (306.0 kB) SOT338-1 [English] | 08 Feb 2016 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English] | 08 Oct 2009 |
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
Ordering Information
| Product | Status | Family | Function | VCC (V) | Description | Output drive capability (mA) | Package version | Logic switching levels | tpd (ns) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV4060DB | Active | LV | Binary counters/timers | 1.0 - 5.5 | 14-stage binary ripple counter with oscillator | +/- 6 | SOT338-1 | TTL | 29 | low | -40~125 | 148 | 42.0 | SSOP16 | 16 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV4060DB | | SOT338-1 | SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74LV4060DB,118 (9351 660 80118) | LV4060 | 74LV4060DB |    | week 13, 2005 | 144.9 | 10.23 | 9.78E7 | 1 | 1 |
| Bulk Pack | Active | 74LV4060DB,112 (9351 660 80112) | LV4060 | 74LV4060DB | | week 13, 2005 | 144.9 | 10.23 | 9.78E7 | 1 | 1 |
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- plastic shrink small outline package; 16 leads; body width 5.3 mm 74HC_T_595_Q100
- Footprint for reflow soldering 74HC_T_595_Q100
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