The 74LVC00A provides four 2-input NAND gates.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
Name/Description | Modified Date |
---|---|
Quad 2-input NAND gate (REV 7.0) PDF (192.0 kB) 74LVC00A [English] | 25 Apr 2012 |
Name/Description | Modified Date |
---|---|
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English] | 04 Feb 2011 |
Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English] | 05 Feb 2002 |
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English] | 15 Sep 1995 |
Name/Description | Modified Date |
---|---|
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Name/Description | Modified Date |
---|---|
plastic thin shrink small outline package; 14 leads; body width 4.4 mm (REV 1.0) PDF (285.0 kB) SOT402-1 [English] | 08 Feb 2016 |
Name/Description | Modified Date |
---|---|
TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (217.0 kB) SOT402-1_118 [English] | 08 Apr 2013 |
Name/Description | Modified Date |
---|---|
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
Product | Status | Family | Function | VCC (V) | Type | Logic switching levels | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
74LVC00APW | Active | LVC | NAND gates | 1.2 - 3.6 | NAND gates | CMOS/LVTTL | quad 2-input NAND gate | +/- 24 | SOT402-1 | 2.1 | 150 | 4 | low | -40~125 | 144 | 8.7 | 70 | TSSOP14 | 14 |
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
74LVC00APW | SOT402-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74LVC00APW,118 (9352 499 80118) | LVC00A | 74LVC00APW | week 10, 2005 | 123.8 | 3.87 | 2.58E8 | 1 | 1 | ||
Bulk Pack | Active | 74LVC00APW,112 (9352 499 80112) | LVC00A | 74LVC00APW | week 10, 2005 | 123.8 | 3.87 | 2.58E8 | 1 | 1 |