74LVC1G08GS: Single 2-input AND gate
The 74LVC1G08 provides one 2-input AND function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
sot1202_3d
Data Sheets (1)
Application Notes (4)
Package Information (1)
Packing (1)
Supporting Information (1)
Name/Description | Modified Date |
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MAR_SOT1202 Topmark (REV 1.0) PDF (49.0 kB) MAR_SOT1202 [English] | 03 Jun 2013 |
IBIS Model
Ordering Information
Product | Status | Family | Function | VCC (V) | Description | Logic switching levels | Type | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
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74LVC1G08GS | Active | LVC | AND gates | 1.65 - 5.5 | single 2-input AND gate | CMOS / LVTTL | AND gates | +/- 24 | SOT1202 | 2.1 | 150 | 1 | low | -40~125 | 325 | 29.9 | 218 | XSON6 | 6 |
Package Information
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | MSL | MSL LF |
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74LVC1G08GS | | SOT1202 | | Reel 7" Q1/T1, Q3/T4 | Active | 74LVC1G08GS,132
(9352 928 97132) | VE | 74LVC1G08GS | | Always Pb-free | 123.8 | 1 | 1 |