74LVC823ABQ: 9-bit D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state
The 74LVC823A is a 9-bit D-type flip-flop with common clock (pin CP), clock enable (pin CE), master reset (pin MR) and 3-state outputs (pins Qn) for bus-oriented applications. The 9 flip-flops stores the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW to HIGH CP transition, provided pin CE is LOW. When pin CE is HIGH, the flip-flops hold their data. A LOW on pin MR resets all flip-flops. When pin OE is LOW, the contents of the 9 flip-flops are available at the outputs. When pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications.
74LVC823ABQ: Product Block Diagram
Outline 3d SOT815-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| 9-bit D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state (REV 4.0) PDF (148.0 kB) 74LVC823A [English] | 08 Apr 2013 |
Application Notes (5)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
| Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English] | 04 Feb 2011 |
| Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English] | 05 Feb 2002 |
| Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English] | 15 Sep 1995 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x... (REV 1.0) PDF (195.0 kB) SOT815-1 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| DHVQFN24; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 4.0) PDF (205.0 kB) SOT815-1_118 [English] | 19 Apr 2013 |
IBIS Model
- lvc823a IBIS model (REV 1.0) ibs LVC823A 4/7/2013
SPICE model
- lvc Spice model (REV 1.0) ZIP LVC 5/7/2013
Ordering Information
| Product | Status | Family | Function | VCC (V) | Logic switching levels | Description | Package version | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC823ABQ | Active | LVC | D-type flip-flops | 1.2 - 3.6 | CMOS/LVTTL | positive-edge trigger (3-state) | SOT815-1 | +/- 24 | 5.4 | 150 | low | -40~125 | 72 | 7.5 | 44 | DHVQFN24 | 24 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC823ABQ | | SOT815-1 | Reel 13" Q1/T1 | Active | 74LVC823ABQ,118 (9352 756 19118) | LVC823A | 74LVC823ABQ |    | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 |
