74LVT16543ADL: 3.3V LVT 16-bit registered transceiver (3-State)

The 74LVT16543A is a high-performance BiCMOS product designed for Vcc operation at 3.3V. The device can be used as two 8-bit transceivers or one 16-bit transceiver.

The 74LVT16543A contains two sets of eight D-type latches, with separate control pins for each set. Using data flow from A to B as an example, when the A-to-B Enable (nEAB) input and the A-to-B Latch Enable (nLEAB) input are Low, the A-to-B path is transparent.

A subsequent Low-to-High transition of the nLEAB signal puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs. With nEAB and nOEAB both Low, the 3-State B output buffers are active and display the data present at the outputs of the A latches.

Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

74LVT16543ADL: Product Block Diagram

Outline 3d SOT371-1

Data Sheets (1)

Name/Description	Modified Date
3.3 V LVT 16-bit registered transceiver (3-state) (REV 2.0) PDF (94.0 kB) 74LVT16543A [English]	13 Mar 2014

Application Notes (7)

Name/Description	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Test Fixtures for High Speed Logic (REV 1.0) PDF (341.0 kB) AN203 [English]	02 Apr 1998
Transmission Lines and Terminations with Philips Advanced Logic Families (REV 1.0) PDF (217.0 kB) AN246 [English]	01 Feb 1998
LVT (Low Voltage Technology) and ALVT (Advanced LVT) (REV 1.0) PDF (133.0 kB) AN243 [English]	01 Jan 1998

Selector Guides (2)

Name/Description	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

Package Information (1)

Name/Description	Modified Date
plastic shrink small outline package; 56 leads; body width 7.5 mm (REV 1.0) PDF (530.0 kB) SOT371-1 [English]	08 Feb 2016

Supporting Information (2)

Name/Description	Modified Date
Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English]	08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]	08 Oct 2009

IBIS Model

lvt16543a IBIS model (REV 1.0) ibs LVT16543A 4/7/2013

SPICE model

lvt16 Spice model (REV 1.0) ZIP LVT16 5/7/2013

Ordering Information

Product	Status	Family	Function	V_CC (V)	Description	Logic switching levels	Package version	Output drive capability	t_pd (ns)	No of bits	f_max (MHz)	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74LVT16543ADL	Active	LVT	Transceivers	2.7 - 3.6	16-bit registered transceiver with bus hold (3-state)	TTL	SOT371-1	-32/+64	2.2	16	150	medium		84	24.0		SSOP56	56

Package Information

Product ID	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	LeadFree Conversion Date	EFR	IFR(FIT)	MTBF(hour)	MSL	MSL LF
74LVT16543ADL	SOT371-1	SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE	Tube in Drypack	Active	74LVT16543ADL,512 (9351 827 50512)	LVT16543A	74LVT16543ADL	week 13, 2005	70.8	1.33	7.52E8	1	2
			Reel 13" Q1/T1 in Drypack	Active	74LVT16543ADL,518 (9351 827 50518)	LVT16543A	74LVT16543ADL	week 13, 2005	70.8	1.33	7.52E8	1	2
			Reel 13" Q1/T1	Withdrawn	74LVT16543ADL,118 (9351 827 50118)	LVT16543A	74LVT16543ADL		70.8	1.33	7.52E8	1	NA