74LVC(H)16374A-Q100: 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
The 74LVC16374A-Q100 and 74LVCH16374A-Q100 are 16-bit edge-triggered flip-flops featuring separate D-type inputs with bus hold (74LVCH16374A-Q100 only) for each flip-flop and 3-state outputs for bus-oriented applications. It consists of two sections of eight positive edge-triggered flip-flops. A clock input (nCP) and an output enable (nOE) are provided for each octal. The flip-flops store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition.
The flip-flops store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition.
When pin nOE is LOW, the contents of the flip-flops are available at the outputs. When pin nOE is HIGH, the outputs go to the high-impedance OFF-state. Operation of input nOE does not affect the state of the flip-flops. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications. Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Outline 3d SOT362-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state (REV 1.0) PDF (123.0 kB) 74LVC_LVCH16374A_Q100 | 28 Jan 2013 |
Application Notes (2)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 | 13 Mar 2013 |
Brochures (1)
| Name/Description | Modified Date |
|---|---|
| Low voltage CMOS family - LVC (REV 1.0) PDF (2.6 MB) 75017668 | 10 Jul 2015 |
Selector Guides (2)
| Name/Description | Modified Date |
|---|---|
| ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP | 19 Nov 2015 |
| Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 | 08 Jan 2015 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic thin shrink small outline package; 48 leads; body width 6.1 mm (REV 1.0) PDF (467.0 kB) SOT362-1 | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| TSSOP48; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 5.0) PDF (242.0 kB) SOT362-1_118 | 15 Apr 2013 |
Supporting Information (1)
| Name/Description | Modified Date |
|---|---|
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE | 08 Oct 2009 |
Ordering Information
| Product | Status |
|---|---|
| 74LVC16374ADGG-Q100 | Active |
| 74LVCH16374ADGG-Q100 | Active |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVCH16374ADGG-Q100 | | SOT362-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74LVCH16374ADGG-QJ (9353 003 57118) | LVCH16374A | 74LVCH16374ADGG-Q100 |    | Always Pb-free | 123.8 | 1 | 1 |
| 74LVC16374ADGG-Q100 | | SOT362-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74LVC16374ADGG-Q1J (9353 002 32118) | LVC16374A | 74LVC16374ADGG-Q100 | | Always Pb-free | 123.8 | 1 | 1 |
