• 简体中文
• English

BSC9132: QorIQ® Qonverge BSC9132 Dual-core Processor and Dual-core DSP

The BSC9132 is a highly integrated device that targets small cell base station, enterprise VoIP, smart grid control, miltary/defense and industrial applications. The BSC9132 device combines two e500 cores, built on Power Architecture ® technology, and two StarCore® SC3850 cores with MAPLE-B2P baseband acceleration processing elements to address the need for a high-performance, low-cost, integrated solution that handles a broad range of specialist DSP functions with complementary high performance general purpose processing.

For small cell applications, the BSC9132 supports multimode operation with 20 MHz LTE TDD or FDD, and WCDMA 5 MHz.

QoriQ Qonverge BSC9132 Processor

HD Video Streaming over LTE - Demo

特性

• Power Architecture subsystem including two e500 processors with 512-Kbyte shared L2 cache
• Two StarCore® SC3850 DSP subsystems, each with a 512-Kbyte private L2 cache
• The MAPLE-B2P multi-accelerator platform engine supports functions that enable LTE-FDD/TDD, WiMAX and WCDMA/HSPA+ wireless standards, as well as common DSP function acceleration including FFT, DFT and Turbo Viterbi coding
• 32 Kbyte of shared M3 memory
• Two DDR3/3L memory interfaces with 32-bit data width (40 bits including ECC), up to 1333 MHz data rate
• Integrated Flash memory controller (IFC) Security
• Integrated security acceleration (SEC)
• Trust architecture secure boot
• Two RF interfaces supporting JESD207 (ADI)
• Two pulse width modulators (PWM) for control of external components
• Support of MaxPhy interface (Maxim)
• Two DMA controllers. OCNDMA with four bidirectional channels and SysDMA with 16 bi-directional channels -one controller serves both the Power Architecture cores and DSP domains with the other controller used mainly for DSP operations
• Two triple-speed Gigabit-Ethernet controllers featuring network acceleration including IEEE 1588™ v2 hardware support for two SGMII ports
• USB 2.0 host and device controller
• Two DUART, Two SPI, and two I2C controllers
• GPIO, TDM with 512 channels
• Four-lane SerDes PHY that multiplexes the following:
  • Two Common Public Radio Interface (CPRI) controller lanes
  • USIM interface
• Two Common Public Radio Interface (CPRI) controller lanes
• USIM interface

Recommended Documentation (3)

Data Sheets (1)

Application Notes (4)

Fact Sheets (2)

White Papers (2)

Ordering Information

Package Information

Package Description	Outline Version	Packing	Product Status	Part Number	Chemical Content	RoHS / Pb FreeChina RoHS Lookup	MSL	PPT (°C)
FCPBGA 780 23*23 P0.8	98ASA00254D	MPQ - 60 TRAYPOQ - 300 BRICK	Active	BSC9132NSE7KNKB	BSC9132NSE7KNKB.pdf		3	245
		MPQ - 60 TRAYPOQ - 300 BRICK	Active	BSC9132NSE7MNMB	BSC9132NSE7MNMB.pdf		3	245
		MPQ - 60 TRAYPOQ - 300 BRICK	Active	BSC9132NSN7KNKB	BSC9132NSN7KNKB.pdf		3	245
		MPQ - 60 TRAYPOQ - 300 BRICK	Active	BSC9132NSN7MNMB	BSC9132NSN7MNMB.pdf		3	245
		MPQ - 60 TRAYPOQ - 300 BRICK	Active	BSC9132NXE7KNKB	BSC9132NXE7KNKB.pdf		3	245
		MPQ - 60 TRAYPOQ - 300 BRICK	Active	BSC9132NXE7MNMB	BSC9132NXE7MNMB.pdf		3	245
		MPQ - 60 TRAYPOQ - 300 BRICK	Active	BSC9132NXN7KNKB	BSC9132NXN7KNKB.pdf		3	245
		MPQ - 60 TRAYPOQ - 300 BRICK	Active	BSC9132NXN7MNMB	BSC9132NXN7MNMB.pdf		3	245