GTL2003: 8-bit bidirectional low voltage translator

The Gunning Transceiver Logic - Transceiver Voltage Clamps (GTL-TVC) provide high-speed voltage translation with low ON-state resistance and minimal propagation delay. The GTL2003 provides eight NMOS pass transistors (Sn and Dn) with a common gate (GREF) and a reference transistor (SREF and DREF). The device allows bidirectional voltage translations between 0.8 V and 5.0 V without use of a direction pin. Voltage translation below 0.8 V can be achieved when properly biased. For more information, refer to application note AN11127.

When the Sn or Dn port is LOW, the clamp is in the ON-state and a low resistance connection exists between the Sn and Dn ports. Assuming the higher voltage is on the Dn port, when the Dn port is HIGH, the voltage on the Sn port is limited to the voltage set by the reference transistor (SREF). When the Sn port is HIGH, the Dn port is pulled to VDD1 by the pull-up resistors. This functionality allows a seamless translation between higher and lower voltages selected by the user, without the need for directional control.

All transistors have the same electrical characteristics and there is minimal deviation from one output to another in voltage or propagation delay. This is a benefit over discrete transistor voltage translation solutions, since the fabrication of the transistors is symmetrical. Because all transistors in the device are identical, SREF and DREF can be located on any of the other eight matched Sn/Dn transistors, allowing for easier board layout. The translator's transistors provide excellent ESD protection to lower voltage devices and at the same time protect less ESD-resistant devices.

GTL2003: Product Block Diagram
Outline 3d SOT360-1

  • 8-bit bidirectional low voltage translator
  • Allows voltage level translation between 0.8 V, 0.9 V, 1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V buses which allows direct interface with GTL, GTL+, LVTTL/TTL and 5 V CMOS levels
  • Provides bidirectional voltage translation with no direction pin
  • Low 6.5 Ω ON-state resistance (Ron) between input and output pins (Sn/Dn)
  • Supports hot insertion
  • No power supply required: will not latch up
  • 5 V tolerant inputs
  • Low standby current
  • Flow-through pinout for ease of printed-circuit board trace routing
  • ESD protection exceeds 2000 V HBM per JESD22-A114, and 1000 V CDM per JESD22-C101
  • Packages offered: TSSOP20, DHVQFN20

  • Any application that requires bidirectional or unidirectional voltage level translation from any voltage from 0.8 V to 5.0 V to any voltage from 0.8 V to 5.0 V
  • The open-drain construction with no direction pin is ideal for bidirectional low voltage (for example, 0.8 V, 0.9 V, 1.0 V, 1.2 V, 1.5 V, or 1.8 V) processor I²C-bus port translation to the normal 3.3 V and/or 5.0 V I²C-bus signal levels or GTL/GTL+ translation to LVTTL/TTL signal levels.

Data Sheets (1)
Name/DescriptionModified Date
8-bit birectional low voltage translator (REV 2.0) PDF (376.0 kB) GTL200303 Jul 2012
Application Notes (4)
Name/DescriptionModified Date
Bidirectional voltage level translators NVT2001/02/03/04/06/08/10, PCA9306, GTL2000/02/03/10 (REV 1.0) PDF (982.0 kB) AN1112717 Apr 2012
Level shifting techniques in I2C-bus design (REV 1.0) PDF (52.0 kB) AN1044120 Jun 2007
AN10145 Bi-directional low voltage translators (REV 2.0) PDF (326.0 kB) AN1014511 Aug 2004
I2C manual (REV 1.0) PDF (4.2 MB) AN1021627 Mar 2003
Users Guides (3)
Name/DescriptionModified Date
I2C-bus specification and user manual (REV 6.0) PDF (1.4 MB) UM1020428 Apr 2014
I2C-bus specification and user manual (REV 5.0) PDF (1.6 MB) UM10204_JA03 Apr 2013
I2C Demonstration Board 2005-1 Quick Start Guide (REV 1.0) PDF (261.0 kB) UM1020613 Jun 2006
Brochures (3)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP16 Feb 2015
NXP® I2C-bus solutions 2014: Smart, simple solutions for the 12 most common design concerns (REV 1.0) PDF (3.5 MB) 7501754001 Aug 2014
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 7501751120 May 2014
Package Information (2)
Name/DescriptionModified Date
plastic thin shrink small outline package; 20 leads; body width 4.4 mm (REV 1.0) PDF (304.0 kB) SOT360-108 Feb 2016
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x... (REV 1.0) PDF (190.0 kB) SOT764-108 Feb 2016
Packing (2)
Name/DescriptionModified Date
DHVQFN20; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or... (REV 4.0) PDF (203.0 kB) SOT764-1_11523 Apr 2013
TSSOP20; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 4.0) PDF (225.0 kB) SOT360-1_11815 Apr 2013
Reports or Presentations (1)
Name/DescriptionModified Date
design_con_2003_tecforum_i2c_b_1 (REV 0.1) PDF (4.2 MB) DESIGN_CON_2003_TECFORUM_I2C_B_127 Jan 2003
Supporting Information (1)
Name/DescriptionModified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE08 Oct 2009
Ordering Information
ProductStatusPackage versionApplicationFunctionOperating Temperature (Cel)Number of bitsVoltage Translation Range (V)
GTL2003BQActiveSOT764-1Voltage TranslationOpen Drain Voltage Translation-40~8581.0 to 5.0 ~ 1.0 to 5.0
GTL2003PWActiveSOT360-1Voltage TranslationOpen Drain Voltage Translation-40~8581.0 to 5.0 ~ 1.0 to 5.0
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
GTL2003PWSOT360-1SSOP-TSSOP-VSO-WAVEReel 13" Q1/T1ActiveGTL2003PW,118 (9352 841 86118)GTL2003GTL2003PWAlways Pb-free0.03.03.33E811
Bulk PackActiveGTL2003PW,112 (9352 841 86112)GTL2003GTL2003PWAlways Pb-free0.03.03.33E811
GTL2003BQSOT764-1Reel 7" Q1/T1ActiveGTL2003BQ,115 (9352 841 87115)2003GTL2003BQAlways Pb-free0.03.03.33E811
8-bit birectional low voltage translator gtl2003
Bidirectional voltage level translators NVT2001/02/03/04/06/08/10, PCA9306, GTL2000/02/03/10 pca9306
Level shifting techniques in I2C-bus design pca9685pw
AN10145 Bi-directional low voltage translators pca9922pw
I2C manual se98apw
I2C-bus specification and user manual pca9685pw
I2C-bus specification and user manual pca9685pw
I2C Demonstration Board 2005-1 Quick Start Guide pca9685pw
電圧レベルシフタ 74AVC16245DGG-Q100
NXP® I2C-bus solutions 2014: Smart, simple solutions for the 12 most common design concerns pca9685pw
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
design_con_2003_tecforum_i2c_b_1 lm75a
SOT360-1 LPC1112FDH20
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
Reel 13" Q1/T1 LPC824M201JDH20
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x... 74LVC_H_245A_Q100
DHVQFN20; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or... 74LVC_H_245A_Q100
GTL2003
PCA9634
74VHC_T_245