GTL2018PW: 8-bit LVTTL to GTL transceiver
The GTL2018 is an octal translating transceiver designed for 3.3 V LVTTL system interface with a GTL-/GTL/GTL+ bus.
The direction pin (DIR) allows the part to function as either a GTL-to-LVTTL sampling receiver or as an LVTTL-to-GTL interface.
The GTL2018 LVTTL inputs (only) are tolerant up to 5.5 V, allowing direct access to TTL or 5 V CMOS inputs.
Outline 3d SOT355-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| 8-bit LVTTL to GTL transceiver (REV 2.0) PDF (170.0 kB) GTL2018 | 29 Aug 2011 |
Application Notes (1)
| Name/Description | Modified Date |
|---|---|
| I2C manual (REV 1.0) PDF (4.2 MB) AN10216 | 27 Mar 2003 |
Brochures (2)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 | 20 May 2014 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic thin shrink small outline package; 24 leads; body width 4.4 mm (REV 1.0) PDF (353.0 kB) SOT355-1 | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| TSSOP24; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 4.1) PDF (227.0 kB) SOT355-1_118 | 15 Apr 2013 |
Reports or Presentations (1)
| Name/Description | Modified Date |
|---|---|
| design_con_2003_tecforum_i2c_b_1 (REV 0.1) PDF (4.2 MB) DESIGN_CON_2003_TECFORUM_I2C_B_1 | 27 Jan 2003 |
Supporting Information (1)
| Name/Description | Modified Date |
|---|---|
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE | 08 Oct 2009 |
Ordering Information
| Product | Status | Package version | Application | Function | Operating Temperature (Cel) | Voltage Translation Range (V) | TTL Drive (mA) | GTL Drive (mA) | Number of bits |
|---|---|---|---|---|---|---|---|---|---|
| GTL2018PW/Q900 | Active | SOT355-1 | Processor Interface | Bi-Directional Non-Latched | -40~85 | 1.14 to 1.65 ~ 3.0 to 5.5 | 16 | 40 | 8 |
| GTL2018PW | Active | SOT355-1 | Processor Interface | Bi-Directional Non-Latched | -40~85 | 1.14 to 1.65 ~ 3.0 to 5.5 | 16 | 40 | 8 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| GTL2018PW | | SOT355-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | GTL2018PW,118 (9352 834 83118) | GTL2018PW | GTL2018PW |    | Always Pb-free | 0.0 | 2.0 | 5E8 | 1 | 1 |
| Bulk Pack | Active | GTL2018PW,112 (9352 834 83112) | GTL2018PW | GTL2018PW | | Always Pb-free | 0.0 | 2.0 | 5E8 | 1 | 1 | ||||
| GTL2018PW/Q900 | | SOT355-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | GTL2018PW/Q900,118 (9352 966 36118) | GTL2018PW | GTL2018PW/Q900 | | Always Pb-free | 0.0 | 2.0 | 5E8 | 1 | 1 |
- 8-bit LVTTL to GTL transceiver GTL2018PW
- I2C manual se98apw
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- design_con_2003_tecforum_i2c_b_1 lm75a
- plastic thin shrink small outline package; 24 leads; body width 4.4 mm 74LVC4245A_Q100
- SSOP-TSSOP-VSO-WAVE LPC1114FDH28
- TSSOP24; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LVC4245A_Q100
- SA639DH
