HEF4518BT: Dual BCD counter
The HEF4518B is a dual 4-bit internally synchronous BCD counter. The counter has an active HIGH clock input (nCP0) and an active LOW clock input (nCP1), buffered outputs from all four bit positions (nQ0 to nQ3) and an active HIGH overriding asynchronous master reset input (nMR). The counter advances on either the LOW-to-HIGH transition of the nCP0 input if nCP1 is HIGH or the HIGH-to-LOW transition of the nCP1 input if nCP0 is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter and the other clock input may be used as a clock enable input. A HIGH on nMR resets the counter (nQ0 to nQ3 = LOW) independent of nCP0, nCP1. Schmitt trigger action in the clock input makes the circuit highly tolerant of slower clock rise and fall times.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.
HEF4518BT: Product Block Diagram
sot109-1_3d
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Dual BCD counter (REV 8.0) PDF (146.0 kB) HEF4518B [English] | 19 Apr 2016 |
Application Notes (1)
| Name/Description | Modified Date |
|---|---|
| Pin FMEA HEF4000 family (REV 2.0) PDF (30.0 kB) AN11051 [English] | 21 Aug 2015 |
Brochures (2)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic small outline package; 16 leads; body width 3.9 mm (REV 1.0) PDF (192.0 kB) SOT109-1 [English] | 08 Feb 2016 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Footprint for reflow soldering (REV 1.0) PDF (9.0 kB) SO-SOJ-REFLOW [English] | 08 Oct 2009 |
| Footprint for wave soldering (REV 1.0) PDF (8.0 kB) SO-SOJ-WAVE [English] | 08 Oct 2009 |
Ordering Information
| Product | Status | Family | Function | VCC (V) | Output drive capability (mA) | Description | Package version | Logic switching levels | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| HEF4518BT | Active | HEF4000B | BCD/decade counters | 4.5 - 15 | +/- 2.4 | dual BCD counter | SOT109-1 | CMOS | 40 | 40 | medium | -40~85 | 77 | 2.7 | 35.1 | SO16 | 16 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| HEF4518BT | | SOT109-1 | SO-SOJ-REFLOW
SO-SOJ-WAVE SO-SOJ-REFLOW SO-SOJ-WAVE | Reel 13" Q1/T1 CECC | Active | HEF4518BT,653 (9333 732 30653) | HEF4518BT | HEF4518BT |    | week 6, 2004 | 75.3 | 2.99 | 3.34E8 | 1 | 1 |
| Bulk Pack, CECC | Active | HEF4518BT,652 (9333 732 30652) | HEF4518BT | HEF4518BT | | week 6, 2004 | 75.3 | 2.99 | 3.34E8 | 1 | 1 |
- Dual BCD counter HEF4518BT
- Pin FMEA HEF4000 family HEF4894B_Q100
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- plastic small outline package; 16 leads; body width 3.9 mm NPIC6C596A_Q100
- Footprint for reflow soldering NPIC6C596A_Q100
- Footprint for wave soldering NPIC6C596A_Q100
- HEF4518B
- SA614A
