LPC11U35FHN33: 64kB flash, 10kB SRAM, HVQFN32 package _ BDTIC a Leading Distributor in China

LPC11U35FHN33: 64kB flash, 10kB SRAM, HVQFN32 package

The LPC11U35FHN33 is a ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit architectures. The LPC11U35FHN33 operates at CPU frequencies of up to 50 MHz. Equipped with a highly flexible and configurable Full Speed USB 2.0 device controller, the LPC11U35FHN33 brings unparalleled design flexibility and seamless integration to today’s demanding connectivity solutions.

sot865-3_3d

Data Sheets (1)

Name/Description	Modified Date
32-bit ARM Cortex-M0 microcontroller; up to 128 kB flash; up to 12 kB SRAM and 4 kB EEPROM; USB device; USART (REV 2.2) PDF (1.9 MB) LPC11U3X	11 Mar 2014

Errata (1)

Name/Description	Modified Date
Errata sheet LPC11U3x (REV 3.0) PDF (41.0 kB) ES_LPC11U3X	12 Aug 2014

Application Notes (11)

Name/Description	Modified Date
LPC11U3x/2x USB Secondary Bootloader (REV 1.0) ZIP (11.2 MB) AN11732	12 May 2016
AES encryption and decryption software on LPC microcontrollers (REV 1.1) ZIP (174.0 kB) AN11241	17 Mar 2014
Guidelines for full-speed USB on NXP®'s LPC microcontrollers (REV 1.1) PDF (148.0 kB) AN11392	20 Feb 2014
USB Audio and USB CDC with FFT for LPC11U14 (REV 1.1) ZIP (1.9 MB) AN11115	09 Aug 2013
USB composite device on LPC11Uxx (REV 1.0) ZIP (1.9 MB) AN11232	09 Aug 2013
I2C secondary boot loader (REV 1.0) ZIP (661.0 kB) AN11258	09 Aug 2013
SPI secondary boot loader (REV 1.0) ZIP (638.0 kB) AN11257	22 Jul 2013
USB In-System Programming with the LPC11U3X/LPC11U2X (REV 1.0) ZIP (1.4 MB) AN11305	22 Jul 2013
How to implement the PMBus software stack (REV 1.0) ZIP (1.1 MB) AN11318	22 Jul 2013
Porting the CMSIS-DAP debugger to the Cortex-M0 platform (REV 1.0) ZIP (912.0 kB) AN11321	22 Jul 2013
UUencoding for UART ISP (REV 1.0) PDF (139.0 kB) AN11229	06 Jul 2012

Users Guides (1)

Name/Description	Modified Date
LPC11U3x/2x/1x User manual (REV 5.4) PDF (3.8 MB) UM10462	01 Nov 2016

Package Information (1)

Name/Description	Modified Date
plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 7 x 7 x 0.85 mm (REV 1.0) PDF (204.0 kB) SOT865-3	08 Feb 2016

Reports or Presentations (1)

Name/Description	Modified Date
Driving LPC11Uxx with EPSON Crystals (REV 1.0) PDF (210.0 kB) R_10074	08 Oct 2015

Supporting Information (1)

Name/Description	Modified Date
ADC design guidelines (REV 1.0) PDF (145.0 kB) TN00009	09 May 2014

Ordering Information

Product	Status	Core	Clock speed [max] (MHz)	DMIPS	Flash (kB)	RAM (kB)	EEPROM (kB)	GPIO	Ethernet	USB	USB (speed)	USB (type)	LCD	CAN	UART	I²C	SPI	I²S	ADC sample rate	ADC channels	ADC (bits)	Comparators	DAC (bits)	Timers	Timer (bits)	SCTimer / PWM	RTC	PWM	Package name	Temperature range	Temperature sensor	IOH	Supply voltage [min] (V)	Supply voltage [max] (V)	Product category	Demoboard
LPC11U35FHN33/501	Introduction Pending	Cortex-M0	50		64	10	4	26		1	FS	device			1	1	2			8	10			4	16; 32	1		11	HVQFN32	-40 °C to +85 °C			1.8	3.6		OM13033; OM13032; OM13041
LPC11U35FHN33/401	Active	Cortex-M0	50		64	10	4	26		1	FS	device			1	1	2			8	10			4	16; 32	1		11	HVQFN32	-40 °C to +85 °C			1.8	3.6		OM13033; OM13032; OM13041

Package Information

Product ID	Package Description	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	RoHS / Pb Free / RHF	LeadFree Conversion Date	MSL	MSL LF
LPC11U35FHN33/401		SOT865-3		Tray, Bakeable, Single in Drypack	Active	LPC11U35FHN33/401, (9352 972 61551)	Standard Marking	LPC11U35FHN33/401		Always Pb-free	3	3
LPC11U35FHN33/501		SOT865-3		Tray, Bakeable, Single in Drypack	Development	LPC11U35FHN33/501, (9352 965 26551)	Standard Marking			Always Pb-free	1	3