PCA9509ADP: Low power level translating I²C-bus/SMBus repeater

The PCA9509A is a level translating I²C-bus/SMBus repeater with two voltage supplies that enables processor low voltage 2-wire serial bus to interface with standard I²C-bus or SMBus I/O. While retaining all the operating modes and features of the I²C-bus system during the level shifts, it also permits extension of the I²C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling the I²C-bus or SMBus maximum capacitance of 400 pF on the higher voltage side. Port A allows a voltage range from 0.8 V to 1.5 V and requires no external pull-up resistors due to the internal current source. Port B allows a voltage range from 2.3 V to 5.5 V and is overvoltage tolerant. Both port A and port B SDA and SCL pins are high-impedance when the PCA9509A is unpowered.

The bus port B drivers are compliant with SMBus I/O levels, while port A uses an offset LOW which prevents bus lock-up and allows the bidirectional nature of the device. Port A uses a current source for pull-up and an offset pull-down driver. This results in a LOW on the port A accommodating smaller voltage swings. The output pull-down on the port A internal buffer LOW is set for approximately 0.2 VCC(A), while the input threshold of the internal buffer is set about 50 mV lower than that of the output voltage LOW. When the port A I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up condition from occurring. The output pull-down on the port B drives a hard LOW and the input level is set at 30 % of SMBus or I²C-bus voltage level which enables port B to connect to any other I²C-bus devices or buffer.

The PCA9509A drivers are not enabled unless VCC(A) is above 0.7 V and VCC(B) is above 1.7 V. The enable (EN) pin can also be used to turn the drivers on and off under system control. Caution should be observed to only change the state of the EN pin when the bus is idle.

The PCA9509A is similar to the PCA9509 but offers lower A port voltage range to 0.8 V to accommodate lower voltage processors and disables the current mirrors when disabled to reduce standby power.

The PCA9509A is recommended for all applications except in the following cases:

Concern

Recommended device

PCA9509

PCA9509A

PCA9509P

A-port — lowest voltage

0.95 V with limitations

0.80 V

A-port — current source [1]

yes — 1 mA

yes — 270 μA

no — external pull-up

operating current [2]

< 6.1 mA

< 1.9 mA

< 0.95 mA

standby current EN = LOW

< 2 mA

< 10 μA max.

[1] The PCA9509 current mirrors do not shut down when the device is disabled allowing instant turn-on, but at the cost of the higher standby current. The PCA9509A and PCA9509P current mirrors are turned off when disabled for lowest standby power consumption, but sufficient delay (10 μs) after enable is needed before resuming operation.

[2] Operating currents do not include the current consumed by the external pull-ups on B-port or the external pull-ups on the A-port of the PCA9509P.

Outline 3d SOT505-1

0 Hz to 400 kHz clock frequency

Remark: The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater.

Data Sheets (1)

Name/Description	Modified Date
Low power level translating I2C-bus/SMBus repeater (REV 2.1) PDF (1.2 MB) PCA9509A	07 Jul 2014

Package Information (1)

Name/Description	Modified Date
plastic thin shrink small outline package; 8 leads; body width 3 mm (REV 1.0) PDF (240.0 kB) SOT505-1	08 Feb 2016

Packing (1)

Name/Description	Modified Date
TSSOP8; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (214.0 kB) SOT505-1_118	15 Apr 2013