MC100EP16VB: Differential Driver / Receiver with High and Low Gain

The EP16VB is a world-class differential receiver/driver. The device is functionally equivalent to the EP16 and LVEP16 devices but with both high and low gain outputs. QHG and QHGbar outputs have a DC gain several times larger than the DC gain of an EP16. Qbar output is provided for feedback purposes.The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01µF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.Special considerations are required for differential inputs under No Signal conditions to prevent instability.The 100 Series contains temperature compensation.

Features

300 ps Typical Propagation Delay
Gain > 200
Maximum Frequency > 3 GHz Typical
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V with VEE = –3.0 V to –5.5 V
VBB Output

Application Notes (15)

Document Title	Document ID/Size	Revision	Revision Date
AC Characteristics of ECL Devices	AND8090/D (896.0kB)	1
Clock Generation and Clock and Data Marking and Ordering Information Guide	AND8002/D (71kB)	12
Designing with PECL (ECL at +5.0 V)	AN1406/D (105.0kB)	2
ECL Clock Distribution Techniques	AN1405/D (54.0kB)	1
ECLinPS Plus™ Spice Modeling Kit	AND8009/D (343.0kB)	11
ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information Guide	AND8002 (71kB)	12
Interfacing Between LVDS and ECL	AN1568/D (121.0kB)	11
Interfacing with ECLinPS	AND8066/D (72kB)	3
Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks	AND8001/D (90.0kB)	0
Phase Lock Loop General Operations	AND8040/D (64.0kB)	3
Storage and Handling of Drypack Surface Mount Device	AND8003/D (49kB)	2	Mar, 2016
Termination of ECL Logic Devices	AND8020/D (176.0kB)	6
The ECL Translator Guide	AN1672/D (142.0kB)	12
Thermal Analysis and Reliability of WIRE BONDED ECL	AND8072/D (119.0kB)	5
Using Wire-OR Ties in ECLInPS™ Designs	AN1650/D (1130.0kB)	3

Data Sheets (1)

Document Title	Document ID/Size	Revision	Revision Date
3.3 V / 5 V ECL Differential Receiver/Driver with High and Low Gain	MC100EP16VB/D (163kB)	8	Aug, 2016

Simulation Models (3)

Document Title	Document ID/Size	Revision
IBS Model for MC100EP16DT 3.3V	MC100EP16DT_33.IBS (5.0kB)	2
IBIS Model for mc100ep16d 5.0V	MC100EP16D_50.IBS (5.0kB)	2
IBIS Model for mc100ep16dt 5.0V	MC100EP16DT_50.IBS (5.0kB)	2

Package Drawings (2)

Document Title	Document ID/Size	Revision
SOIC-8 Narrow Body	751-07 (62.6kB)	AK
TSSOP 8 3.0x3.0x0.95 mm	948R-02 (77.3kB)	A

Order Information

Product	Status	Compliance	Package		MSL*	Container		Budgetary Price/Unit
MC100EP16VBDG	Last Shipments	Pb-free Halide free	SOIC-8	751-07	1	Tube	98
MC100EP16VBDR2G	Lifetime	Pb-free Halide free	SOIC-8	751-07	1	Tape and Reel	2500
MC100EP16VBDTG	Active	Pb-free Halide free	TSSOP-8	948R-02	3	Tube	100	Contact BDTIC
MC100EP16VBDTR2G	Active	Pb-free Halide free	TSSOP-8	948R-02	3	Tape and Reel	2500	Contact BDTIC