MC100EPT24: Translator, LVTTL / LVCMOS to Differential LVECL
The MC100EPT24 is a LVTTL/LVCMOS to differential LVECL translator. Because LVECL levels and LVTTL/LVCMOS levels are used, a -3.3V, +3.3V and ground are required. The small outline 8-lead SOIC package and the single gate of the EPT24 makes it ideal for those applications where space, performance, and low power are at a premium.
Features- 350ps Typical Propagation Delay
- Maximum Frequency > 1.0GHz
- The 100 Series Contains Temperature Compensation
- Operating Range: VCC= 3.0 V to 3.6 V; VEE= -3.6 V to -3.0 V; GND = 0 V
- PNP LVTTL Inputs for Minimal Loading
- Q Output will default HIGH with inputs open
- Pb-Free Packages are Available
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Application Notes (18)
Data Sheets (1)
Simulation Models (2)
Package Drawings (3)
Order Information
| Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
|---|
| MC100EPT24DG | Active | Pb-free
Halide free | SOIC-8 | 751-07 | 1 | Tube | 98 | Contact BDTIC |
| MC100EPT24DR2G | Active | Pb-free
Halide free | SOIC-8 | 751-07 | 1 | Tape and Reel | 2500 | Contact BDTIC |
| MC100EPT24DTG | Active | Pb-free
Halide free | TSSOP-8 | 948R-02 | 3 | Tube | 100 | Contact BDTIC |
| MC100EPT24MNR4G | Active | Pb-free
Halide free | DFN-8 | 506AA | 1 | Tape and Reel | 1000 | Contact BDTIC |
Specifications
| Product | Channels | Input Level | Output Level | VCC Typ (V) | fMax Typ (MHz) | tpd Typ (ns) | tR & tF Max (ps) |
|---|
| MC100EPT24DG | 1 | TTL
CMOS | ECL | 3.3 | 1000 | 0.53 | 170 |
| MC100EPT24DR2G | 1 | TTL
CMOS | ECL | 3.3 | 1000 | 0.53 | 170 |
| MC100EPT24DTG | 1 | TTL
CMOS | ECL | 3.3 | 1000 | 0.53 | 170 |
| MC100EPT24MNR4G | 1 | TTL
CMOS | ECL | 3.3 | 1000 | 0.53 | 170 |
