MC10H602: 9-Bit Latch/TTL-ECL Translator
The MC10H/100H602 is a 9-bit, dual supply TTL to ECL translator with latch. Devices in the 9-bit translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance. The H602 features D-type latches. Latching is controlled by Latch Enable (LEN), while the Master Reset input resets the latches. A post-latch logic enable is also provided (ENECL), allowing control of the output state without destroying latch data. All control inputs are ECL level. The 10H version is compatible with MECL 10H ECL logic levels. The 100H version is compatible with 100K levels.
Features- 9-Bit Ideal for Byte-Parity Applications
- Flow-Through Configuration
- Extra TTL and ECL Power/Ground Pins to Minimize Switching Noise
- Dual Supply
- 3.5 ns Max D to Q
- PNP TTL Inputs for Low Loading
- Pb-Free Packages are Available
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Application Notes (15)
Package Drawings (1)
Document Title | Document ID/Size | Revision |
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28 LEAD PLCC | 776-02 (67.7kB) | F |
Data Sheets (1)
Order Information
Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
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MC10H602FNG | Active | Pb-free
Halide free | PLCC-28 | 776-02 | 3 | Tube | 37 | Contact BDTIC |
Specifications
Product | Channels | Input Level | Output Level | VCC Typ (V) | fMax Typ (MHz) | tpd Typ (ns) | tR & tF Max (ps) |
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MC10H602FNG | 1 | TTL | ECL | 5 | | 2.35 | 1500 |