MC10H641: 1:9 Clock Driver
The MC10H/100H641 is a single supply, low skew translating 1:9 clock driver. Devices in the H600 translator series utilize the 28-lead PLCC for optimal power pinning, signal flow through and electrical performance. The device features a 24mA TTL output stage, with AC performance specified into a 50pF load capacitance. A latch is provided on-chip. When LEN is LOW (or left open, in which case it is pulled LOW by the internal pulldown) the latch is transparent. A HIGH on the enable pin (EN) forces all outputs LOW. Both the LEN and EN pins are positive ECL inputs. The VBB output is provided in case the user wants to drive the device with a single-ended input. For single-ended use the VBB should be connected to the D input and bypassed with a 0.01 F capacitor. The 10H version of the H641 is compatible with positive MECL 10H logic levels. The 100H version is compatible with positive 100K levels.
Features- PECL-TTL Version of Popular ECLinPS E111
- Low Skew
- Guaranteed Skew Spec
- Latched Input
- Differential ECL Internal Design
- VBB Output for Single-Ended Use
- Single +5V Supply
- Logic Enable
- Extra Power and Ground Supplies
- Separate ECL and TTL Supply Pins
- Pb-Free Packages are Available
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Application Notes (10)
Package Drawings (1)
| Document Title | Document ID/Size | Revision |
|---|
| 28 LEAD PLCC | 776-02 (67.7kB) | F |
Data Sheets (1)
Order Information
| Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
|---|
| MC10H641FNG | Active | Pb-free
Halide free | PLCC-28 | 776-02 | 3 | Tube | 37 | Contact BDTIC |
| MC10H641FNR2G | Last Shipments | Pb-free
Halide free | PLCC-28 | 776-02 | 3 | Tape and Reel | 500 | |
Specifications
| Product | Type | Channels | Input / Output Ratio | Input Level | Output Level | VCC Typ (V) | tJitterRMS Typ (ps) | tskew(o-o) Max (ps) | tpd Typ (ns) | tR & tF Max (ps) | fmaxClock Typ (MHz) | fmaxData Typ (Mbps) |
|---|
| MC10H641FNG | Buffer | 1 | 1:9 | ECL | ECL | 5 | | 350 | 5.36 | 1700 | 65 | |
