MC14011UB: Quad 2-Input NAND Gate
The UB Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. The UB set of CMOS gates are inverting non-buffered functions.
Features- Supply Voltage Range = 3.0 Vdc to 18 Vdc
- Linear and Oscillator Applications
- Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range
- Double Diode Protection on All Inputs
- Pin-for-Pin Replacements for Corresponding CD4000 Series UB Suffix Devices
- Pb-Free Packages are Available*
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Packages
Application Notes (1)
Data Sheets (1)
Simulation Models (2)
Package Drawings (1)
Document Title | Document ID/Size | Revision |
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SOIC-14 NB | 751A-03 (34.3kB) | L |
Order Information
Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
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MC14011UBDG | Active | Pb-free
Halide free | SOIC-14 | 751A-03 | 1 | Tube | 55 | $0.1913 |
MC14011UBDR2G | Active | Pb-free
Halide free | SOIC-14 | 751A-03 | 1 | Tape and Reel | 2500 | $0.1913 |
NLV14011UBDG | Active | AEC Qualified
PPAP Capable
Pb-free
Halide free | SOIC-14 | 751A-03 | 1 | Tube | 55 | $0.1907 |
NLV14011UBDR2G | Active | AEC Qualified
PPAP Capable
Pb-free
Halide free | SOIC-14 | 751A-03 | 1 | Tape and Reel | 2500 | $0.1907 |
Specifications
Product | Type | Channels | VCC Min (V) | VCC Max (V) | tpd Max (ns) | IO Max (mA) |
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MC14011UBDG | NAND | 4 | 3 | 18 | 100 | 2.25 |
MC14011UBDR2G | NAND | 4 | 3 | 18 | 100 | 2.25 |
NLV14011UBDG | NAND | 4 | 3 | 18 | 100 | 2.25 |
NLV14011UBDR2G | NAND | 4 | 3 | 18 | 100 | 2.25 |