NB3M8302C: LVCMOS/LVTTL Low Skew Fanout Buffer; 1:2, 3.3 V, 200 MHz
The NB3M8302C is 1:2 fanout buffer with LVCMOS/LVTTL input and output. The device supports the core supply voltage of 3.3 V (VDD pin) and output supply voltage of 2.5 V or 3.3 V (VDDO pin). The VDDO pin powers the two single ended LVCMOS/LVTTL outputs.
The NB3M8302C is Form, Fit and Function (pin to pin) compatible to ICS8302 (ICS8302AM). The NB3M8302C is available for commercial and industrial operating temperature range.
Features- Input Clock Frequency up to 200 MHz
- Low Output to Output Skew: 25 ps typical
- Low Part to Part Skew: 250 ps typical
- Low Additive RMS Phase Jitter
- Input Clock Accepts LVCMOS/ LVTTL Levels
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Applications- Clock Distribution
- Networking and Data Communications
- High-End Computing
| End Products- Ethernet Switches / Routers
- Servers
- Test and Measurement
- ATE
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Application Notes (2)
Data Sheets (1)
Simulation Models (1)
| Document Title | Document ID/Size | Revision | Revision Date |
|---|
| NB3M8302C IBIS Model | NB3M8302C.IBS (110kB) | 0 | Feb, 2014 |
Package Drawings (1)
Order Information
| Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
|---|
| NB3M8302CDG | Active | Pb-free
Halide free | SOIC-8 | 751-07 | 1 | Tube | 98 | Contact BDTIC |
| NB3M8302CDR2G | Active | Pb-free
Halide free | SOIC-8 | 751-07 | 1 | Tape and Reel | 2500 | Contact BDTIC |
Specifications
| Product | Type | Channels | Input / Output Ratio | Input Level | Output Level | VCC Typ (V) | tJitterRMS Typ (ps) | tskew(o-o) Max (ps) | tpd Typ (ns) | tR & tF Max (ps) | fmaxClock Typ (MHz) | fmaxData Typ (Mbps) |
|---|
| NB3M8302CDG | Buffer | 1 | 1:2 | CMOS
TTL | TTL
CMOS | 3.3
2.5 | | 85 | 2.65 | 650
800 | 200 | |
| NB3M8302CDR2G | Buffer | 1 | 1:2 | TTL
CMOS | TTL
CMOS | 2.5
3.3 | | 85 | 2.65 | 650
800 | 200 | |
