NB3M8304C: Fanout Buffer with LVCMOS/LVTTL, Low Skew, 3.3 V 200 MHz 1:4
The NB3M8304C is 1:4 fanout buffer with LVCMOS/LVTTL input and output. The device supports the core supply voltage of 3.3 V (VDD pin) and output supply voltage of 2.5V or 3.3V (VDDO pin). The VDDO pin powers the four single ended LVCMOS/LVTTL outputs.
The NB3M8304C is Form, Fit and Function (pin to pin) compatible to ICS8304 (ICS8304AM). The NB3M8304C is available for commercial and industrial operating temperature range.
Features- Input Clock Frequency up to 200 MHz
- Low Output to Output Skew: 45 ps max at Fin = 133MHz
- Low Part to Part Skew: 500 ps max at Fin = 133MHz
- Low Additive RMS Phase Jitter: 0.17 ps Typical (Fin = 125 MHz, offset freq: 12 kHz to 20 MHz)
- Input Clock Accepts LVCMOS/ LVTTL Levels
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Applications- Clock Distribution
- Networking and Data Communications
- High-End Computing
| End Products- Ethernet Switches / Routers
- Servers
- Test and Measurement
- ATE
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Application Notes (2)
Data Sheets (1)
Simulation Models (1)
Document Title | Document ID/Size | Revision | Revision Date |
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NB3M8304C IBIS Model | NB3M8304C.IBS (110kB) | 0 | Feb, 2014 |
Package Drawings (1)
Order Information
Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
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NB3M8304CDG | Active | Pb-free
Halide free | SOIC-8 | 751-07 | 1 | Tube | 98 | Contact BDTIC |
NB3M8304CDR2G | Active | Pb-free
Halide free | SOIC-8 | 751-07 | 1 | Tape and Reel | 2500 | Contact BDTIC |
Specifications
Product | Type | Channels | Input / Output Ratio | Input Level | Output Level | VCC Typ (V) | tJitterRMS Typ (ps) | tskew(o-o) Max (ps) | tpd Typ (ns) | tR & tF Max (ps) | fmaxClock Typ (MHz) | fmaxData Typ (Mbps) |
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NB3M8304CDG | Buffer | 1 | 1:4 | CMOS
TTL | CMOS
TTL | 3.3
2.5 | | 45 | 2.95
2.6 | 500 | 200 | |
NB3M8304CDR2G | Buffer | 1 | 1:4 | CMOS
TTL | CMOS
TTL | 2.5
3.3 | | 45 | 2.6
2.95 | 500 | 200 | |