NB3N853531E: Xtal Input or LVTTL / LVCMOS Input Mux - 2:1, 3.3 V, Fanout Buffer- 1:4 LVPECL
The NB3N853531E is a low skew 3.3 V supply 2:1:4 clock distribution fanout buffer. An input MUX selects either a Fundamental Parallel Mode Crystal or a LVCMOS/LVTTL Clock by using the CLK_SEL pin (HIGH for Crystal, LOW for Clock) with LVCMOS / LVTTL levels. The single ended CLK input is translated to four LVPECL Outputs. Using the crystal input, the NB3N853531E can be a Clock Generator. A CLK_EN pin can enable or disable the outputs synchronously to eliminate runt pulses using LVCMOS/LVTTL levels (HIGH to enable outputs, LOW to disable output).
Features- Four Differential LVPECL Outputs
- Selectable Crystal or LVCMOS/LVTTL CLOCK Inputs
- Operating Range: VCC = 3.3 5% V( 3.135 to 3.465 V)
- PbFree TSSOP20 Package
- Up to 266 MHz Clock Operation
- Output to Output Skew: 30 ps (Typ)
- Device to Device Skew 200 ps (Max)
- Propagation Delay 1.8 ns (Max)
- Additive Phase Jitter, RMS: 0.053 ps (Typ.)
- Synchronous Clock Enable Control
- Industrial Temp. Range (40C to 85C)
- These are PbFree Devices
- 10Gigibit Ethernet
| Benefits- Multiple copies of the Clock
- Accepts inexpensive crystals
- Ensures operation in the majority of designs
- Meets all green international materials standards
|
Applications- Gigibit Ethernet
- SONET/SDH
- Teleconmmunications
| End Products- LAN/WAN
- Enterprise Servers
- ATE
- Test and Measurement
|
Application Notes (7)
Data Sheets (1)
Simulation Models (1)
Package Drawings (1)
| Document Title | Document ID/Size | Revision |
|---|
| TSSOP-20 WB | 948E-02 (39.7kB) | D |
Order Information
| Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
|---|
| NB3N853531EDTG | Active | Pb-free
Halide free | TSSOP-20 | 948E-02 | 1 | Tube | 75 | Contact BDTIC |
| NB3N853531EDTR2G | Active | Pb-free
Halide free | TSSOP-20 | 948E-02 | 1 | Tape and Reel | 2500 | Contact BDTIC |
Specifications
| Product | Type | Channels | Input / Output Ratio | Input Level | Output Level | VCC Typ (V) | tJitterRMS Typ (ps) | tskew(o-o) Max (ps) | tpd Typ (ns) | tR & tF Max (ps) | fmaxClock Typ (MHz) | fmaxData Typ (Mbps) |
|---|
| NB3N853531EDTG | Buffer | 1 | 2:1:4 | Crystal
LVCMOS
LVTTL | LVPECL | 3.3 | 0.053 | 30 | | 600 | | |
| NB3N853531EDTR2G | Buffer | 1 | 2:1:4 | Crystal
LVCMOS
LVTTL | LVPECL | 3.3 | 0.053 | 30 | | 600 | | |
