NB6L11SMNGEVB: Clock or Data Receiver Evaluation Board
The NB6L11SMNGEVB Evaluation Board is designed to quickly evaluate the NB6L11S, a differential 1:2 Clock or Data Receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and two identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB6L11S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The NB6L11S has a wide input common mode range from GND + 50mV to VCC - 50mV. Combined with the 50-ohm internal termination resistors at the inputs, the NB6L11S is ideal for translating a variety of differential or single-ended Clock or Data signals to 350mV typical LVDS output levels. The NB6L11S is the 2.5 V version of the NB6N11S and is offered in a small 3mm X 3mm 16-QFN package. For more information please see the datasheet.
Evaluation/Development Tool Information
| Product | Status | Compliance | Short Description | Parts Used |
|---|
| NB6L11SMNGEVB | Active | Pb-free | Clock or Data Receiver Evaluation Board | NB6L11SMNG |
Technical Documents
