NB6L14: Clock / Data Fanout Buffer, 1:4 Differential, 3 GHz, 2.5 V / 3.3 V, with LVPECL Outputs
The NB6L14 is a 3.0 GHz differential 1:4 LVPECL fanout buffer. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VT pin. This feature allows the NB6L14 to accept various logic standards, such as LVPECL, LVCMOS, LVTTL, CML, or LVDS logic levels. The VREF_AC reference output can be used to rebias capacitor-coupled differential or single-ended input signals. The 1:4 fanout design was optimized for low output skew applications. The NB6L14 is a member of the ECLinPS MAX family of high performance clock and data products.
Features- Input Clock Frequency > 3.0 GHz
- < 20 ps Within Device Output Skew
- Internal Input Termination Resistors, 50-ohm
- VREFAC Reference Output
| Benefits- High performance applications
- Low Output-to-output skew
- No external components needed for inputs
- Rebias Capacitor-coupled Input signal
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Applications- Clock / Data Distribution
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Simulation Models (1)
Package Drawings (1)
Data Sheets (1)
Evaluation Board Documents (1)
Evaluation/Development Tool Information
Product | Status | Compliance | Short Description |
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NB6L14MNGEVB | Active | Pb-free | Fanout Buffer Evaluation Board |
Order Information
Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
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NB6L14MNG | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tube | 123 | Contact BDTIC |
NB6L14MNR2G | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tape and Reel | 3000 | Contact BDTIC |
Specifications
Product | Type | Channels | Input / Output Ratio | Input Level | Output Level | VCC Typ (V) | tJitterRMS Typ (ps) | tskew(o-o) Max (ps) | tpd Typ (ns) | tR & tF Max (ps) | fmaxClock Typ (MHz) | fmaxData Typ (Mbps) |
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NB6L14MNG | Buffer | 1 | 1:4 | LVPECL
LVDS
LVTTL
LVCMOS
CML | LVPECL | 2.5
3.3 | 0.2 | 20 | 0.37 | 200 | 3000 | 2500 |
NB6L14MNR2G | Buffer | 1 | 1:4 | LVPECL
LVDS
CML
LVTTL
LVCMOS | LVPECL | 2.5
3.3 | 0.2 | 20 | 0.37 | 200 | 3000 | 2500 |