NB6L239: 2.5 V / 3.3 V Any Differential Clock In to Differential LVPECL Out
The NB6L239 is a high-speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; divide 1/2/4/8 and divide 2/4/8/16. Both divider circuits drive a pair of LVPECL outputs
Features- Maximum Clock Input Frequency; ≥ 3GHz
- Input compatibility with LVDS/LVPECL/CML/HSTL
- 70 ps Typical Rise/Fall Times
- 5 ps Typcial Output-to-Output Skew
- Ex. 622.08MHz Input Generates 38.88MHz to 622.08 MHz Outputs
- Internal 50 Ω Termination Provided
- Random Clock Jitter ≤ 1 ps RMS
- Divide-by-1 Edge of QA Aligned to QB divided Output
- Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
- Master Reset for Synchronization of Multiple Chips
- VBBAC Reference Output
- Synchronous Output Disable/Enable
- Telecom/Datacom Routers, Swithes
- Pb-Free Packages are Available
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Applications- Analog-to-Digital Converter Precision Timing
- SONET/SDH Reference Clock Division
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Application Notes (15)
Package Drawings (1)
Simulation Models (1)
Evaluation Board Documents (2)
Data Sheets (1)
Evaluation/Development Tool Information
| Product | Status | Compliance | Short Description |
|---|
| NB6L239MNEVB | Active | | Clock Divider Evaluation Board |
Order Information
| Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
|---|
| NB6L239MNG | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tube | 123 | Contact BDTIC |
| NB6L239MNR2G | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tape and Reel | 3000 | Contact BDTIC |
Specifications
| Product | Type | Input Level | Output Level | VCC Typ (V) | fMax Typ (MHz) | tpd Typ (ns) | tR & tF Max (ps) |
|---|
| NB6L239MNG | Divider | CMOS
ECL
CML
LVDS | ECL | 2.5
3.3 | 3000 | 0.47 | 120 |
| NB6L239MNR2G | Divider | CML
CMOS
LVDS
ECL | ECL | 2.5
3.3 | 3000 | 0.47 | 120 |
