SH7144, SH7145
| Part Name | Order | Program Memory (KB) | RAM (KB) | Operating Voltage Min (V) |
|---|---|---|---|---|
| HD64F7145FW50V | contact | 256.0 | 8.0 | 3.0 |
| HD64F7145F50V | buy | 256.0 | 8.0 | - |
| HD64F7144FW50V | contact | 256.0 | 8.0 | 3.0 |
| HD64F7144F50V | buy | 256.0 | 8.0 | 3.0 |
| HD6437145XXXFW | contact | 256.0 | 8.0 | 3.0 |
| HD6437145XXXF | contact | 256.0 | 8.0 | 3.0 |
| HD6437145WXXXFW | contact | 256.0 | 8.0 | 3.0 |
| HD6437145WXXXF | contact | 256.0 | 8.0 | 3.0 |
| HD6437144XXXFW | contact | 256.0 | 8.0 | 3.0 |
| HD6437144XXXF | contact | 256.0 | 8.0 | 3.0 |
| HD6437144WXXXFW | contact | 256.0 | 8.0 | 3.0 |
| HD6437144WXXXF | contact | 256.0 | 8.0 | 3.0 |
| HD6417145FW50V | contact | 0.0 | 8.0 | 3.0 |
| HD6417145F50V | contact | 0.0 | 8.0 | 3.0 |
| HD6417144FW50V | contact | 0.0 | 8.0 | 3.0 |
| HD6417144F50V | contact | 0.0 | 8.0 | 3.0 |
The SH7144 Series single-chip RISC (Reduced Instruction Set Computer) microcomputers integrate a Renesas-original RISC CPU core with peripheral functions required for system configuration.
The SH7144 series CPU has a RISC-type instruction set. Most instructions can be executed in one state (one system clock cycle), which greatly improves instruction execution speed. In addition, the 32-bit internal-bus architecture enhances data processing power. With this CPU, it has become possible to assemble low cost, high performance/high-functioning systems, even for applications that were previously impossible with microcomputers, such as real-time control, which demands high speeds.
In addition, the SH7144 series includes on-chip peripheral functions necessary for system configuration, such as a direct memory access controller (DMAC), large-capacity ROM and RAM, timers, a serial communication interface (SCI), an A/D converter, an interrupt controller (INTC), and I/O ports. As an option, an I2C bus interface can also be incorporated.
ROM and SRAM can be directly connected to the SH7144 MCU by means of an external memory access support function. This greatly reduces system cost.
There are two versions of on-chip ROM: F-ZTAT™* (Flexible Zero Turn Around Time) that includes flash memory, and mask ROM. The flash memory can be programmed with a programmer that supports SH7144 series programming, and can also be programmed and erased by software. This enables LSI chip to be re-programmed at a user-site while mounted on a board.
Note: * F-ZTAT™ is a registered trademark of Renesas, Ltd.
