74LVC2G02: 双路2输入或非门
74LVC2G02提供一个2输入或非门功能。
输入可通过3.3 V或5 V器件进行驱动。该特性允许在混合3.3 V和5 V环境中将这些器件用作转换器。
该器件完全适合使用IOFF的局部掉电应用。IOFF电路可禁用输出，防止断电时破坏性回流电流通过该器件。
74LVC2G02: 产品结构框图
74LVC2G02: 应用结构框图
Outline 3d SOT505-2
数据手册 (1)
| 名称/描述 | Modified Date |
|---|---|
| Dual 2-input NOR gate (REV 11.0) PDF (277.0 kB) 74LVC2G02 [English] | 08 Apr 2013 |
应用说明 (5)
| 名称/描述 | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
| Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English] | 04 Feb 2011 |
| MicroPak soldering information (REV 2.0) PDF (245.0 kB) AN10343 [English] | 30 Dec 2010 |
| PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English] | 30 Oct 2002 |
手册 (1)
| 名称/描述 | Modified Date |
|---|---|
| Low voltage CMOS family - LVC (REV 1.0) PDF (2.6 MB) 75017668 [English] | 10 Jul 2015 |
封装信息 (8)
包装 (8)
支持信息 (4)
| 名称/描述 | Modified Date |
|---|---|
| MAR_SOT1089 Topmark (REV 1.0) PDF (76.0 kB) MAR_SOT1089 [English] | 03 Jun 2013 |
| MAR_SOT1116 Topmark (REV 1.0) PDF (73.0 kB) MAR_SOT1116 [English] | 03 Jun 2013 |
| MAR_SOT1203 Topmark (REV 1.0) PDF (73.0 kB) MAR_SOT1203 [English] | 03 Jun 2013 |
| MAR_SOT833 Topmark (REV 1.0) PDF (75.0 kB) MAR_SOT833 [English] | 03 Jun 2013 |
IBIS
- 74LVC2G02 IBIS model (REV 1.0) ibs LVC2G02 10/21/2014
订购信息
| 型号 | 状态 |
|---|---|
| 74LVC2G02GN | Active |
| 74LVC2G02DP | Active |
| 74LVC2G02GF | Active |
| 74LVC2G02GM | Active |
| 74LVC2G02GD | Active |
| 74LVC2G02DC | Active |
| 74LVC2G02GT | Active |
| 74LVC2G02GS | Active |
封装环保信息
| 产品编号 | 封装说明 | Outline Version | 回流/波峰焊接 | 包装 | 产品状态 | 部件编号订购码 (12NC) | Marking | 化学成分 | RoHS / 无铅 / RHF | 无铅转换日期 | EFR | IFR(FIT) | MTBF（小时） | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC2G02GS |  | SOT1203 | Reel 7" Q1/T1 | Active | 74LVC2G02GS,115 (9352 923 71115) | pB | 74LVC2G02GS |    | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 | |
| 74LVC2G02DP | | SOT505-2 | Reel 7" Q3/T4, Reverse | Active | 74LVC2G02DP,125 (9352 735 79125) | V02 | 74LVC2G02DP | | week 41, 2004 | 123.8 | 3.87 | 2.58E8 | 1 | 1 | |
| 74LVC2G02GT |  | SOT833-1 | Reel 7" Q1/T1 | Active | 74LVC2G02GT,115 (9352 789 19115) | V02 | 74LVC2G02GT | | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 | |
| 74LVC2G02DC |  | SOT765-1 | Reel 7" Q3/T4, Reverse | Active | 74LVC2G02DC,125 (9352 746 87125) | V02 | 74LVC2G02DC |  | week 1, 2005 | 123.8 | 3.87 | 2.58E8 | 1 | 1 | |
| 74LVC2G02GD |  | SOT996-2 | Reel 7" Q3/T4, Reverse | Active | 74LVC2G02GD,125 (9352 868 53125) | V02 | 74LVC2G02GD | | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 | |
| 74LVC2G02GM |  | SOT902-2 | Reel 7" Q3/T4, Reverse | Active | 74LVC2G02GM,125 (9352 772 36125) | V02 | 74LVC2G02GM | | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 | |
| 74LVC2G02GN |  | SOT1116 | Reel 7" Q1/T1 | Active | 74LVC2G02GN,115 (9352 922 37115) | pB | 74LVC2G02GN | | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 | |
| 74LVC2G02GF |  | SOT1089 | Reel 7" Q1/T1 | Active | 74LVC2G02GF,115 (9352 915 02115) | pB | 74LVC2G02GF | | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 |
- Dual 2-input NOR gate 74LVC2G02GT
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
- Pin FMEA for LVC family 74LVC1G123_Q100
- MicroPak soldering information NTS0102_Q100
- PicoGate Logic footprints NX3L4684
- Low voltage CMOS family - LVC 74LVC_H_245A_Q100
- MAR_SOT1089 Topmark pca9306
- MAR_SOT1116 Topmark 74AXP2T3407GN
- MAR_SOT1203 Topmark 74AXP2T3407GS
- MAR_SOT833 Topmark NCX2222
- 74LVC2G02 IBIS model 74LVC2G02GT
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