MC10H643: 1:8 Clock Driver

The MC10H/100H643 is a dual supply, low skew translating 1:8 clock driver. Devices in the H600 translator series utilize the 28-lead PLCC for optimal power pinning, signal flow through and electrical performance. The dual-supply H643 is similar to the H641, which is a single-supply 1:9 version of the same function. The device features a 48mA TTL output stage, with AC performance specified into a 50pF load capacitance. A Latch is provided on-chip. When LEN is LOW (or left open, in which case it is pulled LOW by the internal pulldowns) the latch is transparent. A HIGH on the enable pin (EN) forces all outputs LOW. The 10H version is compatible with MECL 10H ECL logic levels. The 100H version is compatible with 100K levels.

特性
  • ECL/TTL Version of Popular ECLinPS™ E111
  • Low Skew Within Device 0.5ns
  • Guaranteed Skew Spec Part-to-Part 1.0ns
  • Latch
  • Differential Internal Design
  • VBB Output
  • Dual Supply
  • Reset/Enable
  • Multiple TTL and ECL Power/Ground Pins
  • Pb-Free Packages are Available
封装
应用注释 (10)
Document TitleDocument ID/SizeRevisionRevision Date
AC Characteristics of ECL DevicesAND8090/D (896.0kB)1
Clock Generation and Clock and Data Marking and Ordering Information GuideAND8002/D (71kB)12
Designing with PECL (ECL at +5.0 V)AN1406/D (105.0kB)2
ECL Clock Distribution TechniquesAN1405/D (54.0kB)1
Family Characteristics for MECL 10H™ and MECL 10K™TND309/D (248.0kB)1
Interfacing Between LVDS and ECLAN1568/D (121.0kB)11
Interfacing with ECLinPSAND8066/D (72kB)3
Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksAND8001/D (90.0kB)0
Termination of ECL Logic DevicesAND8020/D (176.0kB)6
The ECL Translator GuideAN1672/D (142.0kB)12
封装图纸 (1)
Document TitleDocument ID/SizeRevision
28 LEAD PLCC776-02 (67.7kB)F
数据表 (1)
Document TitleDocument ID/SizeRevisionRevision Date
Dual Supply ECL to TTL 1:8 Clock DriverMC10H643/D (133kB)9Aug, 2016
产品订购型号
产品状况Compliance封装MSL*容器预算价格 (1千个数量的单价)
MC10H643FNGActivePb-free Halide freePLCC-28776-023Tube37联系BDTIC
订购产品技术参数
ProductTypeChannelsInput / Output RatioInput LevelOutput LevelVCC Typ (V)tJitterRMS Typ (ps)tskew(o-o) Max (ps)tpd Typ (ns)tR & tF Max (ps)fmaxClock Typ (MHz)fmaxData Typ (Mbps)
MC10H643FNGBuffer11:8ECLTTL55004.6120080
Datasheet
Dual Supply ECL to TTL 1:8 Clock Driver (133kB) MC10H643
Other
28 LEAD PLCC MC10H604
ECL Clock Distribution Techniques NB100LVEP91
Designing with PECL (ECL at +5.0 V) NB100LVEP91
Interfacing Between LVDS and ECL NB100ELT23L
The ECL Translator Guide NB100LVEP91
Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks NUP4201
Clock Generation and Clock and Data Marking and Ordering Information Guide NB100LVEP91
Termination of ECL Logic Devices NB100LVEP91
Interfacing with ECLinPS NB100LVEP91
AC Characteristics of ECL Devices NB100LVEP91
Family Characteristics for MECL 10H™ and MECL 10K™ MC10H604