MC74LVX138: 3-to-8 Line Decoder
The MC74LVX138 is an advanced high speed CMOS 3-to-8 line decoder. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems. When the device is enabled, three Binary Select inputs (A0 - A2) determine which one of the outputs (O0 - O7) will go Low. When enable input E3 is held Low or either E2 or E1 is held High, decoding function is inhibited and all outputs go high. E3, E2, and E1 inputs are provided to ease cascade connection and for use as an address decoder for memory systems.
特性- High Speed: tPD = 5.5ns (Typ) at VCC = 3.3V
- Low Power Dissipation: ICC = 4µA (Max) at TA = 25 C
- Power Down Protection Provided on Inputs
- Balanced Propagation Delays
- Low Noise: VOLP = 0.5V (Max)
- Pin and Function Compatible with Other Standard Logic Families
- Latchup Performance Exceeds 300mA
- ESD Performance: HBM > 2000V; Machine Model > 200V PIN
- Pb-Free Packages are Available*
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数据表 (1)
封装图纸 (2)
产品订购型号
| 产品 | 状况 | Compliance | 封装 | MSL* | 容器 | 预算价格 (1千个数量的单价） |
|---|
| MC74LVX138DR2G | Active | Pb-free
Halide free | SOIC-16 | 751B-05 | 1 | Tape and Reel | 2500 | $0.1867 |
| MC74LVX138DTR2G | Active | Pb-free
Halide free | TSSOP-16 | 948F-01 | 1 | Tape and Reel | 2500 | $0.1867 |
订购产品技术参数
| Product | Channels | VCC Min (V) | VCC Max (V) | tpd Max (ns) | IO Max (mA) |
|---|
| MC74LVX138DR2G | 1 | 2 | 3.6 | 12.3 | 4 |
| MC74LVX138DTR2G | 1 | 2 | 3.6 | 12.3 | 4 |
