CY74FCT162652AT 具有三态输出的 16 位总线收发器和寄存器
CY74FCT162652AT 描述
The CY74FCT16646T and CY74FCT162646T 16-bit transceivers are three-state, D-type registers, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a HIGH logic level. Output Enable (OE\) and direction pins (DIR) are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register, or in both. The select controls can multiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the Output Enable (OE\) is Active LOW.
CY74FCT162652AT 特性
- Ioff supports partial-power-down mode operation
- Edge-rate control circuitry for significantly improved noise characteristics
- Typical output skew < 250 ps
- ESD > 2000V
- TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
- Industrial temperature range of -40°C to +85°C
- VCC = 5V ± 10%
- CY74FCT16646T Features:
- 64 mA sink current, 32 mA source current
- Typical V OLP (ground bounce) <1.0V at VCC = 5V, TA = 25°C
- CY74FCT162646T Features:
- Balanced 24 mA output drivers
- Reduced system switching noise
- Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA = 25°C
CY74FCT162652AT 芯片订购指南
器件 |
状态 |
温度 |
价格(美元) |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
CY74FCT162652ATPVC |
ACTIVE |
-40 to 85 |
2.35 | 1ku |
SSOP (DL) | 56 |
20 | TUBE |
|
CY74FCT162543ETPVC |
OBSOLETE |
-40 to 85 |
|
SSOP (DL) | 56 |
|
|
CY74FCT162652AT 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
CY74FCT162652ATPVC |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CY74FCT162652ATPVC |
CY74FCT162652ATPVC |
CY74FCT162543ETPVC |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CY74FCT162543ETPVC |
CY74FCT162543ETPVC |
CY74FCT162652AT 应用技术支持与电子电路设计开发资源下载
- CY74FCT162652AT 数据资料 dataSheet 下载.PDF
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