This octal buffer and line driver is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The SN74AC240 device is organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver
SN74AC240-Q1 | |
Voltage Nodes(V) | 5, 3.3 |
Vcc range(V) | 2.0 to 6.0 |
Input Level | CMOS |
Output Level | CMOS |
No. of Outputs | 8 |
Output Drive(mA) | -24/24 |
tpd max(ns) | 6.5 |
Static Current | 0.004 |
Logic | Inv |
Technology Family | AC |
Rating | Automotive |
器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
SN74AC240QPWRG4Q1 | ACTIVE | -40 to 125 | 0.46 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R | |
SN74AC240QPWRQ1 | ACTIVE | -40 to 125 | 0.46 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
SN74AC240QPWRG4Q1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AC240QPWRG4Q1 | SN74AC240QPWRG4Q1 |
SN74AC240QPWRQ1 | Pb-Free (RoHS) | CU NIPDAU | Level-1-250C-UNLIM | SN74AC240QPWRQ1 | SN74AC240QPWRQ1 |