时钟分配

时钟分配
Part Number Description Features Package/Pins
MAX9169 4-Port LVDS-to-LVDS Repeaters Fail-Safe Inputs SOIC(N)/16 ,TSSOP/16
MAX9173 Quad LVDS Line Receiver with Flow-Through Pinout and In-Path Fail-Safe Flow-Through Pinout ,Inline Fail-Safe SOIC(N)/16 ,TSSOP/16
MAX9394 2:1 Multiplexers and 1:2 Demultiplexers with Loopback with Input Low Level Fail Safe Detection Fail-Safe Inputs ,Integrated Splitter/Multiplexer TQFN/28 ,TQFP/32
MAX9395 2:1 Multiplexers and 1:2 Demultiplexers with Loopback with Input High Level Fail Safe Detection Fail-Safe Inputs ,Integrated Splitter/Multiplexer TQFN/28 ,TQFP/32
MAX3841 12.5Gbps CML 2 x 2 Crosspoint Switch Integrated Input Termination ,Integrated Output Termination TQFN/24
MAX9392 Anything-2-LVDS Dual 2x2 Crosspoint Switches Anything Inputs ,Flow-Through Pinout ,High-Level Input Fail-Safe Detection TQFN/32 ,TQFP/32
MAX9393 Anything-2-LVDS Dual 2x2 Crosspoint Switches Anything Inputs ,Flow-Through Pinout ,Low-Level Input Fail-Safe Detection TQFN/32 ,TQFP/32
MAX9376 Dual 2.0Ghz Anything-to-LVPECL/LVDS Translator Anything Inputs ,Flow-Through Pinout µMAX/10
MAX9390 Anything-2-LVDS Dual 2x2 Crosspoint Switches Anything Inputs ,Cross-Flow Pinout ,High-Level Input Fail-Safe Detection TQFN/32 ,TQFP/32
MAX9391 Anything-2-LVDS Dual 2x2 Crosspoint Switches Anything Inputs ,Cross-Flow Pinout ,Low-Level Input Fail-Safe Detection TQFN/32
MAX9174 670MHz LVDS to LVDS 1:2 splitter Fail-Safe Inputs ,Low Power Shutdown Mode ,Power-Down Inputs Tolerate Undershoot/Overshoot ,Rx/Tx Hi-Z at Power-Off µMAX/10
MAX9175 670MHz Anything to LVDS 1:2 splitter Anything Inputs ,Low Power Shutdown Mode ,Power-Down Inputs Tolerate Undershoot/Overshoot ,Rx/Tx Hi-Z at Power-Off µMAX/10
MAX9375 Differential Anything-to-LVPECLTranslator Anything Inputs ,Flow-Through Pinout µMAX/8
MAX9377 Differential Anything-to-LVPECLTranslator Anything Inputs ,Flow-Through Pinout µMAX/8
MAX9378 Differential Anything-to-LVDS Translator Anything Inputs ,Flow-Through Pinout µMAX/8
MAX9179 Quad LVDS receiver with hysteresis Active-High/Low Enables ,Built-in Hysteresis ,Fail-Safe Inputs ,Flow-Through Pinout ,High-ESD Rating ,Rx Hi-Z at Power-Off TQFN/16 ,TSSOP/16
MAX9164 Single 3.3V LVDS driver/receiver Fail-Safe Inputs ,Flow-Through Pinout TSSOP/14
MAX9389 Differential 8:1 ECL/PECL Mux with Dual Output Buffers Fail-Safe Inputs TQFN/32 ,TQFP/32
MAX9176 670 MHz LVDS to LVDS 2:1 mux Fail-Safe Inputs ,High-ESD Rating ,Low Power Shutdown Mode µMAX/10
MAX9177 670 MHz Anything  to LVDS 2:1 mux Anything Inputs ,High-ESD Rating ,Low Power Shutdown Mode µMAX/10
MAX9316A 1:5 Differential (LV)PECL/(LV)ECL/HSTL Clock and Data Driver Fail-Safe Inputs ,Selectable Single Ended or Differential Input ,Synchronous Output Enable SOIC(W)/20
MAX9386 Differential 5:1 ECL/PECL Multiplexer Fail-Safe Inputs QSOP/20 ,TSSOP/20
MAX9387 Differential 5:1 ECL/PECL Multiplexer with dual output buffers Fail-Safe Inputs QSOP/24 ,TSSOP/24
MAX9388 Differential 4:1 ECL/PECL Multiplexer Fail-Safe Inputs QSOP/20 ,TSSOP/20
MAX9172 Dual LVDS Line Receiver with In-Path Fail-Safe Flow-Through Pinout ,Inline Fail-Safe SOIC(N)/8 ,SOT/8
MAX9323 One to Four LVCMOS to LVPECL Clock and Data Driver Synchronous Output Enable TSSOP/20
MAX9324 One to Five LVPECL/LVCMOS Output Clock and Data Driver Fail-Safe Inputs ,Synchronous Output Enable TSSOP/20
MAX9322 1:15 Differential LVPECL/LVECL/HSTL Clock and Data Driver Differential Input Mux ,Divide-by-1 or Divide-by-2 Outputs TQFP/52
MAX9325 1:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver Differential Input Mux ,Fail-Safe Inputs PLCC/28
MAX9326 1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver Fail-Safe Inputs PLCC/28
MAX9317 Dual 1:5 LVPECL to LVDS Clock and Data Driver - LQFP/32 ,TQFN/32
MAX9317A Dual 1:5 LVPECL to LVDS Clock and Data Driver Integrated Input Termination LQFP/32 ,TQFN/32
MAX9317B Dual 1:5 LVPECL to LVDS Clock and Data Driver - LQFP/32 ,TQFN/32
MAX9317C Dual 1:5 LVPECL to LVDS Clock and Data Driver Integrated Input Termination LQFP/32 ,TQFN/32
MAX9384 Dual Differential 2:1 LVECL/LVPECL Multiplexer Fail-Safe Inputs SOIC(W)/20
MAX9310 1:5 LVPECL to LVDS CLock and Data Driver Differential Input Mux ,Fail-Safe Inputs TSSOP/20
MAX9310A 1:5 LVPECL to LVDS CLock and Data Driver Differential Input Mux ,Fail-Safe Inputs TSSOP/20
MAX9160 LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver Fail-Safe Inputs ,High-ESD Rating ,Integrated Output Termination ,Rx Hi-Z at Power-Off ,Tx Hi-Z Enable Pins TSSOP/28
MAX9181 Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package Rx/Tx Hi-Z at Power-Off SC-70/6
MAX9370 LVTTL/TTL-to-Differential LVPECL/PECL Translator Fail-Safe Inputs µMAX/8 ,SOIC(N)/8 ,SOT/8
MAX9371 LVTTL/TTL-to-Differential LVPECL/PECL Translator Fail-Safe Inputs µMAX/8 ,SOIC(N)/8 ,SOT/8
MAX9372 LVTTL/TTL-to-Differential LVPECL/PECL Translator Fail-Safe Inputs µMAX/8 ,SOT/8
MAX9424 Quad PECL-to-ECL Differential Translator Synchronous/Asynchronous Operation TQFP/32
MAX9425 Quad PECL-to-ECL Differential Translator Integrated Output Termination ,Synchronous/Asynchronous Operation TQFP/32
MAX9426 Quad PECL-to-ECL Differential Translator Integrated Input Termination ,Synchronous/Asynchronous Operation See Data Sheet
MAX9427 Quad PECL-to-ECL Differential Translator Integrated Input Termination ,Integrated Output Termination ,Synchronous/Asynchronous Operation See Data Sheet
MAX9320B 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Driver Fail-Safe Inputs µMAX/8 ,SOIC(N)/8
MAX9321B Differential LVPECL/LVECL/HSTL Receiver/Drivers Fail-Safe Inputs SOIC(N)/8
MAX9180 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package Fail-Safe Inputs ,Rx/Tx Hi-Z at Power-Off SC-70/6
MAX9159 Dual LVDS Line Receiver Fail-Safe Inputs See Data Sheet
MAX9420 Quad Differential LVECL  to LVPECL Translators Synchronous/Asynchronous Operation See Data Sheet
MAX9421 Quad Differential LVECL  to LVPECL Translators Integrated Output Termination ,Synchronous/Asynchronous Operation See Data Sheet
MAX9422 Quad Differential LVECL  to LVPECL Translators Integrated Input Termination ,Synchronous/Asynchronous Operation See Data Sheet
MAX9423 Quad Differential LVECL  to LVPECL Translators Integrated Input Termination ,Integrated Output Termination ,Synchronous/Asynchronous Operation See Data Sheet
MAX9374 Differential LVPECL-to-LVDS Translator Fail-Safe Inputs ,Flow-Through Pinout SOT/8
MAX9374A Differential LVPECL-to-LVDS Translator Fail-Safe Inputs ,Flow-Through Pinout SOT/8
MAX9360 LVTTL/CMOS to LVECL/ECL Translators Fail-Safe Inputs SOIC(N)/8 ,SOT/8
MAX9155 Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package Fail-Safe Inputs ,Rx/Tx Hi-Z at Power-Off SC-70/6
MAX9315 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver Differential Input Mux ,Fail-Safe Inputs ,Synchronous Output Enable TSSOP/20
MAX9380 Single-Ended-to-Differential LVECL/LVPECL 2:1 Multiplexer Fail-Safe Inputs SOT/8
MAX9401 Quad ECL/PECL Differential Buffers/Receivers Double Swing Output ,Synchronous/Asynchronous Operation See Data Sheet
MAX9404 Quad ECL/PECL Differential Buffers/Receivers Double Swing Output ,Integrated Input Termination ,Synchronous/Asynchronous Operation See Data Sheet
MAX9156 Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package Rx/Tx Hi-Z at Power-Off See Data Sheet
MAX3783 2.75Gbps Dual Mux/Buffer with Loopback Integrated Input Termination ,Integrated Output Termination ,Integrated Splitter/Multiplexer TQFP-EP/48
MAX9130 Single 500Mbps LVDS Line Receiver in SC70 Fail-Safe Inputs ,Rx Hi-Z at Power-Off SC-70/6
MAX9153 Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 ohm Drive Fail-Safe Inputs ,Tx Hi-Z at Power-Off TSSOP/28
MAX9154 Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 ohm Drive Tx Hi-Z at Power-Off TSSOP/28
MAX9402 Quad Differential LVECL/LVPECL Buffer/Receivers Integrated Output Termination ,Synchronous/Asynchronous Operation QFN/32 ,TQFP/32
MAX9403 Quad Differential LVECL/LVPECL Buffer/Receivers Integrated Input Termination ,Synchronous/Asynchronous Operation See Data Sheet
MAX9129 Quad Bus LVDS Driver with Flow-Through Pinout Flow-Through Pinout ,Tx Hi-Z Enable Pins ,Tx Hi-Z at Power-Off QFN/16 ,TSSOP/16
MAX9121 Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout Fail-Safe Inputs ,Flow-Through Pinout TSSOP/16
MAX9122 Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout Fail-Safe Inputs ,Flow-Through Pinout ,Integrated Input Termination SOIC(N)/16 ,TSSOP/16
MAX9311 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Differential Input Mux ,Fail-Safe Inputs LQFP/32 ,QFN/32 ,TQFP/32
MAX9312 Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Fail-Safe Inputs LQFP/32 ,TQFN/32
MAX9313 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Differential Input Mux ,Fail-Safe Inputs LQFP/32 ,QFN/32
MAX9314 Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Fail-Safe Inputs See Data Sheet
MAX9320 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Fail-Safe Inputs µMAX/8 ,SOIC(N)/8 ,SOT/8
MAX9320A 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Driver Fail-Safe Inputs µMAX/8 ,SOIC(N)/8 ,SOT/8
MAX9321 Differential LVPECL/LVECL/HSTL Receiver/Drivers Fail-Safe Inputs µMAX/8 ,SOIC(N)-EP/8 ,SOT/8
MAX9152 800Mbps LVDS/LVPECL-to-LVDS 2 x 2 Crosspoint Switch Pin-Programmable Configuration ,Pin-Programmable Output Resistance SOIC(N)/16 ,TSSOP/16
MAX9115 Single LVDS Line Receiver in SC70 Fail-Safe Inputs ,Rx Hi-Z at Power-Off SC-70/5
MAX9123 Quad LVDS Line Driver with Flow-Through Pinout Active-High/Low Enables ,Flow-Through Pinout SOIC(N)/16 ,TSSOP/16
MAX3840 +3.3V, 2.7Gbps Dual 2 x 2 Crosspoint Switch Integrated Input Termination ,Integrated Output Termination QFN/32 ,TQFN/32
MAX9110 Single LVDS Line Driver with Ultra-Low Pulse Skew in SOT23 Flow-Through Pinout ,Tx Hi-Z at Power-Off SOIC(N)/8 ,SOT/8
MAX9112 Dual LVDS Line Drivers with Ultra-Low Pulse Skew in SOT23 Flow-Through Pinout ,Tx Hi-Z at Power-Off SOIC(N)/8 ,SOT/8
MAX9150 Low-Jitter, 10-Port LVDS Repeater Fail-Safe Inputs ,Low Power Shutdown Mode ,Rx Hi-Z at Power-Off TSSOP/28
MAX9111 Single LVDS Line Receiver with Ultra-Low Pulse Skew in SOT23 Fail-Safe Inputs ,Flow-Through Pinout ,Rx Hi-Z at Power-Off SOIC(N)/8 ,SOT/8
MAX9113 Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 Fail-Safe Inputs ,Flow-Through Pinout ,Rx Hi-Z at Power-Off SOIC(N)/8 ,SOT/8