The SN54LVC541A octal buffer/driver is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC541A octal buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The ’LVC541A devices are ideal for driving bus lines or buffering memory address registers.
These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.
The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output enable (OE1\ or OE2\) input is high, all eight outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
SN54LVC541A | SN74LVC541A | |
Voltage Nodes(V) | 3.3, 2.7, 2.5, 1.8 | 3.3, 2.7, 2.5, 1.8 |
Vcc range(V) | 2.0 to 3.6 | 2.0 to 3.6 |
Logic | True | True |
Input Level | TTL/CMOS | TTL/CMOS |
Output Level | LVTTL | LVTTL |
Output Drive(mA) | -24/24 | -24/24 |
No. of Gates | 8 | |
No. of Outputs | 8 | 8 |
tpd max(ns) | 5.1 | 5.1 |
Static Current | 0.01 | 0.01 |
Rating | Military | Catalog |
Technology Family | LVC | LVC |
器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
SN54LVC541ADW | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (DW) | 20 | 25 | TUBE | LVC541A |
SN54LVC541ADWE4 | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (DW) | 20 | 25 | TUBE | LVC541A |
SN54LVC541ADWG4 | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (DW) | 20 | 25 | TUBE | LVC541A |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
SN54LVC541ADW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN54LVC541ADW | SN54LVC541ADW |
SN54LVC541ADWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN54LVC541ADWE4 | SN54LVC541ADWE4 |
SN54LVC541ADWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN54LVC541ADWG4 | SN54LVC541ADWG4 |