SN74ACT1071 具有总线保持功能的 10 位总线终端网络

This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1071 prevents bus lines from floating without using pullup or pulldown resistors.

The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state

SN74ACT1071
Voltage Nodes(V) 5  
No. of Bits 10  
Technology Family ACT
SN74ACT1071 特性
SN74ACT1071 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74ACT1071E ACTIVE -55 to 125 1.15 | 1ku PDIP (N) | 14 25 | TUBE  
SN74ACT1071EE4 ACTIVE -55 to 125 1.15 | 1ku PDIP (N) | 14 25 | TUBE  
SN74ACT1071MT ACTIVE -55 to 125 1.55 | 1ku SOIC (D) | 14 250 | SMALL T&R  
SN74ACT1071MTE4 ACTIVE -55 to 125 1.55 | 1ku SOIC (D) | 14 250 | SMALL T&R  
SN74ACT1071MTG4 ACTIVE -55 to 125 1.55 | 1ku SOIC (D) | 14 250 | SMALL T&R  
SN74ACT1071 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74ACT1071E Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type SN74ACT1071E SN74ACT1071E
SN74ACT1071EE4 Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type SN74ACT1071EE4 SN74ACT1071EE4
SN74ACT1071MT Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74ACT1071MT SN74ACT1071MT
SN74ACT1071MTE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74ACT1071MTE4 SN74ACT1071MTE4
SN74ACT1071MTG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74ACT1071MTG4 SN74ACT1071MTG4
SN74ACT1071 应用技术支持与电子电路设计开发资源下载
  1. SN74ACT1071 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器特殊逻辑产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)