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SN74LV123A 双路可重触发单稳多频振荡器

The ’LV123A devices are dual retriggerable monostable multivibrators designed for 2-V to 5.5-V VCC operation.

These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method, the A\ input is low and the B input goes high. In the second method, the B input is high and the A\ input goes low. In the third method, the A\ input is low, the B input is high, and the clear (CLR)\ input goes high.

The output pulse duration is programmable by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC

	SN74LV123A
Voltage Nodes(V)	5, 3.3, 2.5
Vcc range(V)	2 to 5.5
Rating	Catalog
Technology Family	LV-A

SN74LV123A 特性

• 2-V to 5.5-V VCC Operation
• Max tpd of 11 ns at 5 V
• Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
• Supports Mixed-Mode Voltage Operation on All Ports
• Schmitt-Trigger Circuitry on A\, B, and CLR\ Inputs for Slow Input Transition Rates
• Edge Triggered From Active-High or Active-Low Gated Logic Inputs
• Ioff Supports Partial-Power-Down Mode Operation
• Retriggerable for Very Long Output Pulses, Up to 100% Duty Cycle
• Overriding Clear Terminates Output Pulse
• Glitch-Free Power-Up Reset on Outputs
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

SN74LV123A 芯片订购指南

器件	状态	温度	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN74LV123AD	ACTIVE	0 to 70	3.00 | 1ku	SOIC (D) | 16	50 | TUBE
SN74LV123ADE4	ACTIVE	0 to 70	3.00 | 1ku	SOIC (D) | 16	50 | TUBE
SN74LV123ADG4	ACTIVE	0 to 70	3.00 | 1ku	SOIC (D) | 16	50 | TUBE
SN74LV123ADR	ACTIVE	0 to 70	2.50 | 1ku	SOIC (D) | 16	2500 | LARGE T&R
SN74LV123ADRE4	ACTIVE	0 to 70	2.50 | 1ku	SOIC (D) | 16	2500 | LARGE T&R
SN74LV123ADRG4	ACTIVE	0 to 70	2.50 | 1ku	SOIC (D) | 16	2500 | LARGE T&R
SN74LV123AN	ACTIVE	0 to 70	2.75 | 1ku	PDIP (N) | 16	25 | TUBE
SN74LV123ANE4	ACTIVE	0 to 70	2.75 | 1ku	PDIP (N) | 16	25 | TUBE

SN74LV123A 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN74LV123AD	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV123AD	SN74LV123AD
SN74LV123ADE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV123ADE4	SN74LV123ADE4
SN74LV123ADG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV123ADG4	SN74LV123ADG4
SN74LV123ADR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV123ADR	SN74LV123ADR
SN74LV123ADRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV123ADRE4	SN74LV123ADRE4
SN74LV123ADRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV123ADRG4	SN74LV123ADRG4
SN74LV123AN	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	SN74LV123AN	SN74LV123AN
SN74LV123ANE4	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	SN74LV123ANE4	SN74LV123ANE4

SN74LV123A 应用技术支持与电子电路设计开发资源下载

1. SN74LV123A 数据资料 dataSheet 下载.PDF
2. TI 德州仪器特殊逻辑产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)