This octal buffer/line driver is operational at 1.5-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCC operation.
The SN74LVC244A is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down
| SN74LVC244A | |
| Voltage Nodes(V) | 3.3, 2.7, 2.5, 1.8 |
| Vcc range(V) | 2.0 to 3.6 |
| Logic | True |
| Input Level | TTL/CMOS |
| Output Level | LVTTL |
| Output Drive(mA) | -24/24 |
| No. of Gates | 8 |
| No. of Outputs | 8 |
| tpd max(ns) | 6.5 |
| Static Current | 0.01 |
| Rating | Catalog |
| Technology Family | LVC |
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74LVC244ADW | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (DW) | 20 | 25 | TUBE | LVC244A |
| SN74LVC244ADWE4 | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (DW) | 20 | 25 | TUBE | LVC244A |
| SN74LVC244ADWG4 | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (DW) | 20 | 25 | TUBE | LVC244A |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74LVC244ADW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC244ADW | SN74LVC244ADW |
| SN74LVC244ADWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC244ADWE4 | SN74LVC244ADWE4 |
| SN74LVC244ADWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC244ADWG4 | SN74LVC244ADWG4 |
