| ADS8284 | ADS8285 | |
| Resolution(Bits) | 18 | 18 |
| Sample Rate (max) | 1MSPS | 1MSPS |
| Architecture | SAR | SAR |
| SINAD(dB) | 98.3 | 98.4 |
| SNR(dB) | 97.5 | 97.5 |
| SNR(Typ)(dB) | 98.4 | 98.4 |
| SFDR(dB) | 121 | 121 |
| DNL(Max)(+/-LSB) | +1.5 / -1 | +1.5 / -1 |
| INL(Max)(+/-LSB) | +/-2.5 | 2.5 |
| No Missing Codes(Bits) | 18 | 18 |
| ENOB(Bits) | 15.9 | 15.9 |
| No. of Supplies | 4 | 4 |
| Analog Voltage AV/DD(Min)(V) | 4.75 | 4.75 |
| Analog Voltage AV/DD(Max)(V) | 5.25 | 5.25 |
| Logic Voltage DV/DD(Min)(V) | 2.7 | 2.7 |
| Logic Voltage DV/DD(Max)(V) | 5.25 | 5.25 |
| Input Configuration Range | +/-Vref | Vref |
| Reference Mode | Int and Ext | Int and Ext |
| Rating | Catalog | Catalog |
| Pin/Package | 64VQFN | 64VQFN |
| # Input Channels | 4 | 4 |
| Operating Temperature Range (°C) | -40 to 85 |
The ADS8285 is a high-performance analog system-on-chip (SoC) device with an 18-bit, 1-MSPS A/D converter, 4-V internal reference, an on-chip ADC driver (OPA), and a 8-channel single ended multiplexer. The channel count of the multiplexer and auto/manual scan modes of the device are user selectable.
The ADC driver is designed to leverage the very high noise performance of the differential ADC at optimum power usage levels.
The ADS8285 outputs a buffered reference signal for level shifting of a ±4-V bipolar signal with an external resistance divider. A Vref/2 output signal is available to set the offset of a signal conditioning circuit. The device also includes an 18-/16-/8-bit parallel interface.
| 器件 | 状态 | 封装 | 引脚 |
| ADS8285IBRGCR | PREVIEW | VQFN(RGC) | 64 |
| ADS8285IBRGCT | PREVIEW | VQFN(RGC) | 64 |
| ADS8285IRGCR | PREVIEW | VQFN(RGC) | 64 |
| ADS8285IRGCT | PREVIEW | VQFN(RGC) | 64 |
