CY7C25682KV18, CY7C25702KV18:72-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT(pdf, 857.27 KB)
数据手册更新日期:August 26, 2015
架构 | DDR-II+ CIO, ODT |
---|---|
合格汽车 | 否 |
突发长度(字) | 2 |
密度 (Kb) | 73728 |
Density (Mb) | 72 |
频率 (MHz) | 500 |
最高工作温度 (°C) | 70 |
Max. Operating VCCQ (V) | 1.90 |
最高工作电压 (V) | 1.90 |
最低工作温度 (°C) | 0 |
Min. Operating VCCQ (V) | 1.40 |
最低工作电压 (V) | 1.70 |
组织 (X x Y) | 2Mb x 36 |
温度分类 | 商用 |
工具包 | FBGA |
---|---|
No. of Pins | 165 |
Package Dimensions | 591 L x 1.4 H x 512 W (Mils) |
Package Weight | 501.06 (mgs) |
Package Cross Section Drawing | 下载 |
Package Carrier | TRAY |
Standard Pack Quantity | 136 |
Minimum Order Quantity (MOQ) | 136 |
Order Increment | 136 |
Estimated Lead Time (days) | 91 |
HTS Code | 8542.32.0040 |
ECCN | (B.2.A.) |
ECCN Suball | 3A991 |
Moisture Sensitivity Level (MSL) | 3 |
---|---|
Peak Reflow Temp. (°C) | 220 () Cypress Reflow Profile |
符合有害物质限制 (RoHS) 标准 | N Print RoHS Certificate of Compliance |
无铅 | 否 |
Lead/Ball Finish | Sn/Pb |
Marking | Cypress Marking Format |
文件标题 | 下载 |
CY7C25702KV18 - IBIS |
|
CY7C25702KV18 - Verilog |
|
CY7C25702KV18 - BSDL |
|
文件标题 | 下载 |
PCN115104 |
|
PCN125145 |
|
PCN125174 |
|
PCN155371 |
|
PCN154102 |
|
PCN125157 |
|
PCN125175 |
|
文件标题 | 下载 |
PIN135200 |
|
PIN145277 |
|
文件标题 | 下载 |
PTN155003 |
|