74LVC574A:标准逻辑

Part NumberData SheetSPICE ModelNumber of GatesFamilyVCC Min (V)VCC Max (V)tpd max @ (1.5V) (ns)tpd max @ (1.8V) (ns)tpd max @ (2.5V) (ns)tpd max @ (3.3V) (ns)tpd max @ (5.0V) (ns)Input/ Output Current
74LVC574A74LVC574A.pdf-8LVC1.653.6-13.597-24
Description

The 74LVC574A provides eight edge-triggered D-type flip-flops featuring 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

These devices feature inputs and outputs on opposite sides of the package that facilitate printed circuit board layout. 

The device is designed for operation with a power supply range of 1.65V to 3.6V. The device is fully specified for partial power down applications using IOFF.

Application
  • General Purpose Logic
  • Bus Driving
  • Power Down Signal Isolation
  • Wide Array of Products Such as:
    • PCs, Notebooks, Netbooks, Ultrabooks
    • Networking Computer Peripherals, Hard Drives, CD/DVD ROM
    • TV, DVD, DVR, Set Top Box
Features
  • Supply Voltage Range from 1.65V to 3.6V 
  • Sinks or Sources 24mA at VCC = 3V 
  • CMOS Low Power Consumption 
  • IOFF Supports Partial-Power Down Operation 
  • Inputs or Outputs Accept Up to 5.5V 
  • Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage Applications 
  • Schmitt Trigger Action at All Inputs 
  • Typical VOLP (Quiet Output Ground Bounce) less than 0.8V with VCC = 3.3V and TA = +25°C 
  • Typical VOHV (Quiet Output Dynamic VOH) greater than 2.0V with VCC = 3.3V and TA = +25°C 
  • ESD Protection Tested per JESD 22
    • Exceeds 200-V Machine Model (A115) 
    • Exceeds 2000-V Human Body Model (A114) 
    • Exceeds 1000-V Charged Device Model (C101) 
  • Latch-Up Exceeds 250mA per JESD 78, Class I 
  • All devices are:
    • Totally Lead-Free & Fully RoHS Compliant 
    • Halogen and Antimony Free. “Green” Device 
订购型号
  • 74LVC574AQ20-13
  • 74LVC574AT20-13
TSSOP-20
V-QFN4525-20
74LVC574A.pdf 74LVC574A
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