The Intersil 80C86 high performance 16-bit CMOS CPU is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). Two modes of operation, minimum for small systems and maximum for larger applications such as multiprocessing, allow user configuration to achieve the highest performance level. Full TTL compatibility (with the exception of CLOCK) and industry standard operation allow use of existing NMOS 8086 hardware and software designs.
Key Features
- Compatible with NMOS 8086
- Completely Static CMOS Design
- Low Power Operation
- lCCSB 500mA Max
- ICCOP 10mA/MHz Typ
- 1MByte of Direct Memory Addressing Capability
- 24 Operand Addressing Modes
- Bit, Byte, Word and Block Move Operations
- 8-Bit and 16-Bit Signed/Unsigned Arithmetic
- Binary, or Decimal
- Multiply and Divide
- Wide Operating Temperature Range
- C80C86 0°C to +70°C
- M80C86 -55°C to +125°C
- Pb-Free Available (RoHS Compliant)
Datasheets| Title | Type | Updated | Size | Other Languages |
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| 80C86 Datasheet | PDF | 19 Aug 2015 | 804 KB | |
Order Information| Part Number | Package Type | Weight(g) | Pins | MSL Rating | Peak Temp (°C) | RoHS Status |
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| 8405202QA | 40 Ld CERDIP | 12.74 | 40 | N/A | NA | |
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| CP80C86-2 | 40 Ld PDIP | 6.22 | 40 | N/A | NA | |
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| CP80C86-2Z | 40 Ld PDIP | 6.22 | 40 | N/A | NA | RoHS |
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| CS80C86-2 | 44 Ld | 2.31 | 44 | 3 | 225 | |
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| MD80C86-2/B | 40 Ld CERDIP | 12.74 | 40 | N/A | NA | |
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| MD80C86/7 | 40 Ld SBDIP | 6.87 | 40 | N/A | NA | RoHS |
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