LAN9217
The LAN9217 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9217 has been specifically architected to provide the highest performance possible for any 16-bit application. The LAN9217 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX.
The LAN9217 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a 16-bit external bus. The LAN9217 includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9217 memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity.
The EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the EEPROM at start-up or reset.
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产品特性- Optimized for medium to high performance applications
- Efficient architecture with low CPU overhead
- Easily interfaces to most 16-bit embedded CPU's
- Integrated PHY with HP Auto-MDIX Support
- Supports audio & video streaming over Ethernet: 1-2 high-definition (HD) MPEG2 streams
- Compatible with other members of LAN9218 family
- Video distribution systems, multi-room PVR
- Cable, satellite, and IP set-top boxes
- Digital video recorders and DVD recorder/players
- Digital TV
- Digital media clients/servers and home gateways
- Video-over IP solutions, IP PBX & video phones
- Wireless routers & access points
- High-end audio distribution systems
- Non-PCI Ethernet controller for medium-high performance applications
Highest performing non-PCI Ethernet controller
16-bit interface with fast bus cycle times
Burst-mode read support
External MII interface
- Highest performing non-PCI Ethernet controller
- 16-bit interface with fast bus cycle times
- Burst-mode read support
- External MII interface
- Eliminates dropped packets
Internal buffer memory can store over 200 packets
Automatic PAUSE and back-pressure flow control
- Internal buffer memory can store over 200 packets
- Automatic PAUSE and back-pressure flow control
- Minimizes CPU overhead
Supports Slave-DMA
Interrupt Pin with Programmable Hold-off timer
- Supports Slave-DMA
- Interrupt Pin with Programmable Hold-off timer
- Reduces system cost and increases design flexibility
- SRAM-like interface easily interfaces to most Embedded CPU's or SoC's
- Reduced Power Modes
Numerous power management modes
Wake on LAN*
Magic packet wakeup*
Wakeup indicator event signal
Link Status Change
- Numerous power management modes
- Wake on LAN*
- Magic packet wakeup*
- Wakeup indicator event signal
- Link Status Change
- Single chip Ethernet controller
Fully compliant with IEEE 802.3/802.3u standards
Integrated Ethernet MAC and PHY
10BASE-T and 100BASE-TX support
Full- and Half-duplex support
Full-duplex flow control
Backpressure for half-duplex flow control
Preamble generation and removal
Automatic 32-bit CRC generation and checking
Automatic payload padding and pad removal
Loop-back modes
- Fully compliant with IEEE 802.3/802.3u standards
- Integrated Ethernet MAC and PHY
- 10BASE-T and 100BASE-TX support
- Full- and Half-duplex support
- Full-duplex flow control
- Backpressure for half-duplex flow control
- Preamble generation and removal
- Automatic 32-bit CRC generation and checking
- Automatic payload padding and pad removal
- Loop-back modes
- Flexible address filtering modes
One 48-bit perfect address
64 hash-filtered multicast addresses
Pass all multicast
Promiscuous mode
Inverse filtering
Pass all incoming with status report
Disable reception of broadcast packets
- One 48-bit perfect address
- 64 hash-filtered multicast addresses
- Pass all multicast
- Promiscuous mode
- Inverse filtering
- Pass all incoming with status report
- Disable reception of broadcast packets
- Integrated 10/100 Ethernet PHY
Supports HP Auto-MDIX
Auto-negotiation
Supports energy-detect power down
- Supports HP Auto-MDIX
- Auto-negotiation
- Supports energy-detect power down
- Host bus interface
Simple, SRAM-like interface
16-bit data bus
16Kbyte FIFO with flexible TX/RX allocation
One configurable host interrupt
- Simple, SRAM-like interface
- 16-bit data bus
- 16Kbyte FIFO with flexible TX/RX allocation
- One configurable host interrupt
- Miscellaneous features
Low-profile 100-pin TQFP, RoHS Compliant package
Integrated 1.8V regulator
General Purpose Timer
Optional EEPROM interface
Support for 3 status LEDs multiplexed with Programmable GPIO signals
- Low-profile 100-pin TQFP, RoHS Compliant package
- Integrated 1.8V regulator
- General Purpose Timer
- Optional EEPROM interface
- Support for 3 status LEDs multiplexed with Programmable GPIO signals
- Single 3.3V Power Supply with 5V tolerant I/O
- 0° to 70°C Commercial Temperature Support
| 技术参数|
Parameter Name
Value
| Value | |
Description
10Based-T/100Based-TX Ethernet Controller with 16 bit/MII interface
|
10Based-T/100Based-TX Ethernet Controller with 16 bit/MII interface
| |
Ethernet Bandwidth
10Base-T/ 100Base-TX
|
10Base-T/ 100Base-TX
| |
MAC
Yes
|
Yes
| |
PHY
Yes
|
Yes
| |
TX/RX RAM Buffer(Bytes)
16K
|
16K
| |
Interrupt Pin
1
|
1
| |
LEDs
3
|
3
| |
Op. Voltage (V)
3.3
|
3.3
| |
# Ethernet Ports
1
|
1
| |
Temp. Range Max. (°C)
70
|
70
| |
Interface1
16 bit Host Bus, MII
|
16 bit Host Bus, MII
| |
Vdd I/O (V)
3.3
|
3.3
|
|
文档资料
订购型号
| Part Number | Leads | Package Type | Temp Range | Packing | 1+ | 26+ | 100+ | 1000+ | 5000+ |
|---|
| LAN9217-MT | 100 | LQFP | 0C to +70C | TRAY | 14.75 | 12.29 | 11.18 | 10.80 | 10.67 |
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器件无铅环保信息
| PartNumber | DeviceWeight | ShippingWeight | LeadCount | PackageType | PackageWidth | SolderComposition | JEDECIndicator | RoHS | ChinaEFUP |
|---|
| LAN9217-MT | 0.580400 | 6.666667 | 100 | LQFP | 14x14x1.6mm | Matte Tin | e3 |  |  |
