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54VCXH162374：Rad-Hard 16-bit D-Type Flip-Flop 3-state

The 54VCXH162374 is a low voltage CMOS 16 bit d-type flip-flop with 3 state outputs non inverting fabricated with sub-micron silicon gate and five-layer metal wiring C²MOS technology. It is ideal for low power and very high speed 1.65 to 3.6 V applications; it can be interfaced to 3.6 V signal environment for both inputs and outputs. These 16 bit d-type flip-flops are controlled by two clock inputs (nCK) and two output enable inputs (nOE). On the positive transition of the (nCK), the nQ outputs will be set to the logic state that were setup at the nD inputs. While the (nOE) input is low, the 8 outputs (nQ) will be in a normal state (HIGH or LOW logic level) and while high level the outputs will be in a high impedance state. Any output control does not affect the internal operation of flip flops; that is, the old data can be retained or the new data can be entered even while the outputs are OFF.

Key Features

• 1.65 to 3.6 V inputs and outputs
• High speed:
  • tPD = 3.4 ns (Max.) at VCC = 3.0 to 3.6 V
  • tPD = 4.8 ns (Max.) at VCC = 2.3 to 2.7 V
• Symmetrical impedance outputs:
  • |IOH | = IOL = 12 mA (Min.) at VCC = 3.0 V
  • |IOH | = IOL = 8 mA (Min.) at VCC = 2.3 V
• Power down protection on inputs and outputs
• 26 Ω serie resistors in outputs
• Operating voltage range:
  • VCC (Opr) = 1.65 V to 3.6 V
• Pin and function compatible with 54 series H162374
• Bus hold provided on both sides
• Cold spare function
• Latch-up performance exceeds 300 mA (JESD 17)
• ESD performance:
  • HBM > 2000 V (MIL STD 883 method 3015); MM > 200 V
• 300 KRad Mil1019.6 condition A, (RHA QML qualification extension undergone)
• No SEL, no SEU and no SET under 110 Mev/cm2/mg LET heavy ions irradiation
• QML qualified product
• Device fully compliant with DSCC SMD 5962-05212
• 100 mV typical input hysteresis

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