ST33 32位闪存微控制器 _ BDTIC 中国领先电子元器件代理商

ST33 32位闪存微控制器

Part Number	General Description	Marketing Status	Internal RAM Size	Security Certification	Communication standards supported	FLASH Size
ST33F1M0	32bit ARM SC300 secure core with SWP, SPI interfaces and Nescrypt cryptoprocessor	Active	30	EAL5+	ISO7816, SWP, SPI slave,	1024
ST33G1M2SC	32bit ARM SC300 secure core for SIM	Active	30	EAL5+, EMVCo	ISO7816, SPI master/slave, 7GPIOs	1280
SC33F1M0	32bit ARM SC300 secure core with SPI interfaces and Nescrypt cryptoprocessor	Active	30	EAL5+	ISO7816, SPI slave	1024
ST33G768	32bit ARM SC300 secure core with SWP for Secure element or SIM-SWP	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	768
ST33G512M	32bit ARM SC300 secure core optimized for M2M	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	512
ST33H640	32bit ARM SC300 secure core with Mifare ClassicTM Accelerator, Nescrypt cryptoprocessor and SWP, SPI, GPIO interfaces	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	640
ST33G1M0SC	32bit ARM SC300 secure core for SIM	Active	30	EAL5+, EMVCo	ISO7816, SPI master/slave, 7GPIOs	1024
SC33F512	32bit ARM SC300 secure core with SPI interfaces and Nescrypt cryptoprocessor	Active	24	EAL5+	ISO7816, SPI slave	896
ST33J1M1	32bit ARM SC300 secure core with secure integrity architecture, AES, DES, Nescrypt public key co-processors	Active	50	EAL5+	ISO7816, SWP, SPI master/slave, Two I2C master/slave, 8GPIO	1152
ST33G896M	32bit ARM SC300 secure core optimized for M2M	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	896
ST33G640	32bit ARM SC300 secure core with SWP for Secure element or SIM-SWP	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	640
ST33G640SM	32bit ARM SC300 secure core with MIFARE™ , SWP for Secure Element and SIM-SWP	Active	30	EAL5+,EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	640
ST33G1M2M	32bit ARM SC300 secure core optimized for M2M	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	1280
SC33F384	32bit ARM SC300 secure core with SPI interfaces and Nescrypt cryptoprocessor	Active	24	EAL5+	ISO7816, SPI slave	384
ST33J1M0	32bit ARM SC300 secure core with secure integrity architecture, AES, DES, Nescrypt public key co-processors	Active	50	EAL5+	ISO7816, SWP, SPI master/slave, Two I2C master/slave, 8GPIO	1024
ST33G1M0	32bit ARM SC300 secure core with SWP for Secure element or SIM-SWP	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	1024
ST33G512SM	32bit ARM SC300 secure core with MIFARE™ , SWP for Secure Element and SIM-SWP	Active	30	EAL5+,EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	512
ST33J1M5	32bit ARM SC300 secure core with secure integrity architecture, AES, DES, Nescrypt public key co-processors	Active	50	EAL5+	ISO7816, SWP, SPI master/slave, Two I2C master/slave, 8GPIO	1536
ST33G1M0M	32bit ARM SC300 secure core optimized for M2M	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	1024
ST33F768	32bit ARM SC300 secure core with SWP, SPI interfaces and Nescrypt cryptoprocessor	Active	30	EAL5+	ISO7816, SWP, SPI slave,	768
ST33G512	32bit ARM SC300 secure core with SWP for Secure element or SIM-SWP	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	512
SC33F768	32bit ARM SC300 secure core with SPI interfaces and Nescrypt cryptoprocessor	Active	30	EAL5+	ISO7816, SPI slave	768
ST33G896SM	32bit ARM SC300 secure core with MIFARE™ , SWP for Secure Element and SIM-SWP	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	896
ST33G512A	32bit ARM SC300 secure core optimized for M2M for car	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	512
ST33G896	32bit ARM SC300 secure core with SWP for Secure element or SIM-SWP	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	896
ST33G512SC	32bit ARM SC300 secure core for SIM	Active	30	EAL5+, EMVCo	ISO7816, SPI master/slave, 7GPIOs	512
ST33G896A	32bit ARM SC300 secure core optimized for M2M for car	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	896
ST33I1M2	32bit ARM SC300 secure element with enhanced performances	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	1280
ST33J1M8	32bit ARM SC300 secure core withsecure integrity architecture, AES, DES, Nescrypt public key co-processors	Active	50	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, Two I2C master/slave, 9GPIO	1792
SC33F640	32bit ARM SC300 secure core with SPI interfaces and Nescrypt cryptoprocessor	Active	24	EAL5+	ISO7816, SPI slave	640
ST33G768SM	32bit ARM SC300 secure core with MIFARE™ , SWP for Secure Element and SIM-SWP	Active	30	EAL5+,EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	768
ST33G384A	32bit ARM SC300 secure core optimized for M2M for car	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	384
ST33G384SC	32bit ARM SC300 secure core for SIM	Active	30	EAL5+, EMVCo	ISO7816, SPI master/slave, 7GPIOs	384
ST33G768SC	32bit ARM SC300 secure core for SIM	Active	30	EAL5+, EMVCo	ISO7816, SPI master/slave, 7GPIOs	768
ST33G1M2SM	32bit ARM SC300 secure core with MIFARE™ , SWP for Secure Element and SIM-SWP	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	1280
ST33F512	32bit ARM SC300 secure core with SWP, SPI interfaces and Nescrypt cryptoprocessor	Active	24	EAL5+	ISO7816, SWP, SPI slave,	512
ST33G768A	32bit ARM SC300 secure core optimized for M2M for car	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	768
ST33H512	32bit ARM SC300 secure core with Mifare ClassicTM Accelerator, Nescrypt cryptoprocessor and SWP, SPI, GPIO interfaces	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	512
ST33G1M2A	32bit ARM SC300 secure core optimized for M2M for car	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	1280
ST33G1M2	32bit ARM SC300 secure core with SWP for Secure element or SIM-SWP	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	1280
SC33F896	32bit ARM SC300 secure core with SPI interfaces and Nescrypt cryptoprocessor	Active	30	EAL5+	ISO7816, SPI slave	896
ST33G640SC	32bit ARM SC300 secure core for SIM	Active	30	EAL5+, EMVCo	ISO7816, SPI master/slave, 7GPIOs	640
ST33G1M0SM	32bit ARM SC300 secure core with MIFARE™ , SWP for Secure Element and SIM-SWP	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	1024
ST33G640A	32bit ARM SC300 secure core optimized for M2M for car	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	640
ST33H384	32bit ARM SC300 secure core with Mifare ClassicTM Accelerator, Nescrypt cryptoprocessor and SWP, SPI, GPIO interfaces	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	512
ST33J2M0	32bit ARM SC300 secure core with secure integrity architecture, AES, DES, Nescrypt public key co-processors	Active	50	EAL5+	ISO7816, SWP, SPI master/slave, Two I2C master/slave, 8GPIO	2048
ST33G1M0A	32bit ARM SC300 secure core optimized for M2M for car	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	1024
ST33G640M	32bit ARM SC300 secure core optimized for M2M	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	640
ST33H768	32bit ARM SC300 secure core with Mifare ClassicTM Accelerator, Nescrypt cryptoprocessor and SWP, SPI, GPIO interfaces	Active	30	EAL5+, EMVCo	ISO7816, SWP, SPI master/slave, 7GPIOs	768
ST33F1M	32bit ARM SC300 secure core with SWP, SPI interfaces and Nescrypt cryptoprocessor	Active	30	EAL5+	ISO7816, SWP, SPI slave,	1280
ST33F640	32bit ARM SC300 secure core with SWP, SPI interfaces and Nescrypt cryptoprocessor	Active	24	EAL5+	ISO7816, SWP, SPI slave,	640
ST33J896	32bit ARM SC300 secure core with secure integrity architecture, AES, DES, Nescrypt public key co-processors	Active	50	EAL5+	ISO7816, SWP, SPI master/slave, Two I2C master/slave, 8GPIO	896
ST33F896	32bit ARM SC300 secure core with SWP, SPI interfaces and Nescrypt cryptoprocessor	Active	30	EAL5+	ISO7816, SWP, SPI slave,	896
ST33G896SC	32bit ARM SC300 secure core for SIM	Active	30	EAL5+, EMVCo	ISO7816, SPI master/slave, 7GPIOs	896
ST33J1M3	32bit ARM SC300 secure core with secure integrity architecture, AES, DES, Nescrypt public key co-processors	Active	50	EAL5+	ISO7816, SWP, SPI master/slave, Two I2C master/slave, 8GPIO	1280
ST33G384M	32bit ARM SC300 secure core optimized for M2M	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	384
ST33G768M	32bit ARM SC300 secure core optimized for M2M	Active	30	EAL5+	ISO7816, SWP, SPI master/slave, 7GPIOs	768

ST33 32位闪存微控制器

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